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TMS570LS0432: about startup.c code

whong zhao
Genius 4190 points
Part Number: TMS570LS0432


Dear Team

I refer the safety library 2.4 demo code.

in the sys_startup.c  I have some problems

——————————————————————————————————————————————————————

else if (RESET_TYPE_CPU == resetReason)
{

SYS_EXCEPTION = CPU_RESET;

/* reset could be caused by stcSelfCheck run or by an actual CPU self-test run */

/* check if this was an stcSelfCheck run */
if ((stcREG->STCSCSCR & 0xFU) == 0xAU)
{
/* check if the self-test fail bit is set */
if ((stcREG->STCGSTAT & 0x3U) != 0x3U)
{
/* STC self-check has failed */
stcSelfCheckFail();
}
/* STC self-check has passed */
else
{
/* clear self-check mode */
stcREG->STCSCSCR = 0x05U;

/* clear STC global status flags */
stcREG->STCGSTAT = 0x3U;

/* clear ESM group1 channel 27 status flag */
esmREG->SR1[0U] = 0x08000000U;

/* Start CPU Self-Test */
cpuSelfTest(STC_INTERVAL, STC_MAX_TIMEOUT, TRUE);
}
}
/* CPU reset caused by CPU self-test completion */
else if ((stcREG->STCGSTAT & 0x1U) == 0x1U)
{
/* Self-Test Fail flag is set */
if ((stcREG->STCGSTAT & 0x2U) == 0x2U)
{
/* Call CPU self-test failure handler */
cpuSelfTestFail();
}
/* CPU self-test completed successfully */
else
{
/* clear STC global status flag */
stcREG->STCGSTAT = 0x1U;

/* Continue start-up sequence after CPU STC completed */
afterSTC();
}
}
/* CPU reset caused by software writing to CPU RESET bit */
else
{
/* Add custom routine here to handle the case where software causes CPU reset */
}

}

————————————————————————————————————————————————————

I think the cpu be able to enter here after the CPU self-test （“SL_Self_Test_STC”）reset. 

if ((stcREG->STCSCSCR & 0xFU) == 0xAU)

what does this code means?Does it mean self-checking? What is the situation to enter here

and this code

cpuSelfTest(STC_INTERVAL, STC_MAX_TIMEOUT, TRUE);

What's the difference between SL_Self_Test_STC

  • 0
    Genius 4190 points

    Hello 

     I see the trm.  the STC interval 0.

    what dose it means？

  • +1 in reply to whong zhao
    TI__Guru**** 199096 points

    There are two tests mentioned in the TRM. 

    1. STC self-test or CPU self-test: This test is enabled by writing 0xA to STC_ENA of STCGCR1 register

    2. STC self-check which is to check STC compare logic. This test is enabled by writing 0xA to SELF_CHECK_KEY in STCSCSCR register. The Self-check can only be done for the STC interval 0.

    Both tests will generate a CPU reset after completion of the test regardless of pass or fail.

  • 0 in reply to QJ Wang
    Genius 4190 points

    Thank you 

    When to perform this test，“SL_Self_Test_STC

    When to perform this test，cpuSelfTest

    Can these two tests be executed when the cpu is powered on?

    if ((stcREG->STCSCSCR & 0xFU) == 0xAU) can run the cpuSelfTest，

    when set the AU，I dont find

  • 0 in reply to whong zhao
    Genius 4190 points

    Hello

    When to perform this test，“SL_Self_Test_STC

    When to perform this test，cpuSelfTest

    Can these two tests be executed when the cpu is powered on?

     I refer the library，Actually there is a piece of code

    if(RESET_TYPE_DEBUG != resetReason)
    {
    /* Make sure that the CPU self-test controller can actually detect a fault inside CPU */
    stcSelfTestConfig.stcClockDiv = 0; /* STC Clock divider = 1 */
    stcSelfTestConfig.intervalCount = 1; /* One interval only */
    stcSelfTestConfig.restartInterval0 = TRUE; /* Start from interval 0 */
    stcSelfTestConfig.timeoutCounter = 0x1; /* Timeout counter*/
    _SL_HoldNClear_nError();

    /* mask vim interrupts before running STC */
    vimREG->REQMASKCLR0 = 0xFFFFFFFFu;
    vimREG->REQMASKCLR1 = 0xFFFFFFFFu;
    vimREG->REQMASKCLR2 = 0xFFFFFFFFu;
    vimREG->REQMASKCLR3 = 0xFFFFFFFFu;

    /* ensure no pending ESM GRP2 errors before running STC */
    if(esmREG->SSR2 == 0u)
    {
    SL_SelfTest_STC(STC_COMPARE_SELFCHECK, TRUE, &stcSelfTestConfig);
    }
    else
    {
    FailSafeFun(FSD_CPUSTARTUP_SELFTEST_ERROR);
    while(1); //ESM Group2 error
    }

    }

    if that  the cpu start can run the two code  “SL_SelfTest_STC” and “cpuSelfTest”

    generate two times CPU reset ？？

  • 0 in reply to whong zhao
    TI__Guru**** 199096 points

    Typically those tests are performed at startup. You can also run the tests periodically.

    yes, both STC self-test and STC self-check will generate CPU reset.

  • 0 in reply to QJ Wang
    Genius 4190 points

    Hello

    Which of these two functions is executed first？

    “SL_SelfTest_STC ” “cpuSelfTest”

  • 0 in reply to whong zhao
    TI__Guru**** 199096 points

    Normally STC self-check is executed first to make sure that the STC controller can actually detect a fault inside CPU.

    Please check with the assessor or your safety consultant if the periodic execution of LBIST and PBIST is required in a particular period of time. 

    In most use cases performing LBIST and PBIST at boot time is good enough. The lockstep cores and ECC logic for RAM are performing the diagnostic continuously.

    In the case of lockstep cores, the second core is constantly executing the same instructions/code as the primary core and the outputs of each core are continuously compared through the core compare module. If there is a malfunction in one of the two cores, this will be caught by the diagnostic (compare).

    In regard to PBIST, a one time execution at startup proves integrity over the entirety of RAM. During application run time, SECDED takes over as the active diagnostic and prevents/notifies of any issues with RAM. Note that PBIST is not designed to be ran periodically in that it is a destructive test.