TMS570LC4357: RST1: Is it absolutely necessary to monitor nRST?

Hello,

Q1: The default functionality of J2 is GIOB[6]. During reset, this pin is configured as input with pull-down. After reset, its functionality and state are defined by the application SW. Before the GIO module is initialized, the GIOB[6] is configured as Input with pull-down (or LOW state). If the clock failure (OSC, or PLL slip) generates RESET, the failure will impact the J2 state.

Q2: The nPORRST is required for device to enter the safe state. The "safe state" is the state that the device output drivers are tri-stated and I/O pins are kept in input only state. The nPORRST is in active (LOW).

Hello QJ,

Thank you for answering so quickly.

I realised (Q2) was misleading. I was inquiring about using the J2 Pin to signal an error condition and to signal that an Reset has occured, although the Safety Manual proposes the nRST Pin for signaling a reset to external hardware.

We think that using J2 over nRST would have the benefit, that J2 would remain in input pull-down state after reset, untill the SW reconfigures it as nERROR. This would make it possible, for the SW to not reconfigure the Pin, if the SW detects the reset, and thus signal to the external hardware to stay in a safe state (With "safe state" I wantetd to refer to the safe state of µC external hardware and not µC safe state).

(Q3) Is there a known fault that would lead to J2 not beeing reset on reset (warm or powe on) (e.g. OSC Failure and µC Low-Power OSC) and thus forcing us to use nRST as well?

(Q4) Is the reset of the pin configuration register synchronous or asynchronous?

Thank you and best regards,
Max