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The HalCoGen allows only 32 message boxes for the 0714 and 0914 device. Isn't possible to increase the number ??
On quick look into 1227, 0714, 0914 datasheets they have exactly same DCAN1 RAM memory map, so why less message boxes ?
1227:
0714
0914
The DCAN module on 144-pin PGE package has 64 mailboxes. But 100-pin PZ package has less mailboxes.
I checked the design spec, both DCAN modules on LS0714PZ support 64 mailboxes. Have you tried to transmit CAN message using mailbox 64? I will try this tomorrow.
.. And then, also wanted to note, that HalCoGen _only_ gives 16 message boxes for CAN2. Bah, why/how ..
I really don't understand how this calculation works. And how to really read TI datasheets and manual - its all over , for me. Device manual, 64 boxes. Datasheet, seems 64. Each DCAN RAM frame in memory map , is 2KB. So , the total message RAM is limited by, exact DCAN variant ? Where does one get that information?
The higher spec devs like LC4357, have 8KB DCANx frames, yet , only 64 message boxes ... ? Seems you can fit hell lots of more...
Is the magic 64 absolute limit of some internal DCAN counter wrap around? How to check the actual DCAN module 's internal message RAM size , as used on a specific TMS570xx .... ???
Hello v01d,
DCAN1 and DCAN2 modules on TMS570LS0714PZ support 64 mailboxes. There is a SW bug on HAL DCAN configuration GUI for LS714PZ and LS0914PZ devices.
TMS570LC43x has 8KB DCAN RAM, 2KB for message objects and 2KB for ECC, remaining 4KB is left for future use.
Got my 0914, and I can confirm its at least 64 working on CAN1. 0714 still to check , but I assume you confirmed its 64.
Thank you for the explanation on the question above about frame sizes & boxes.
BTW: if 2K for ECC on 43x device, how can then total frame size of 2K on 0714 fit 64 message boxes ... ? 64 x 24 (bytes per object) = 1536 ; 2048 - 1536 = 512 bytes left for ECC, no? So ECC only needs 512 bytes here?