TMS570LC4357: SCI via DMA only transmits one byte at a time

Arturo Apu Chinchilla

Part Number: TMS570LC4357

Hello,

I am using DMA to get data from an external device connected to SCI3. To the best of my understanding (and according to the nice example https://www.ti.com/lit/an/spna213/spna213.pdf), the DMA "reads 32 bits at a time from the data RAM incrementing the address". Nevertheless, the data in my desination address is always 3 bytes of 0 and 1 byte of (correct) data.

For example, if the external device sends 0x3A45B, the desination address gets {0x0, 0x0, 0x0, 0x3, 0x0, 0x0, 0x0, 0xA, 0x0, 0x0, 0x0, 0x4, 0x0, 0x0, 0x0, 0x5, 0x0, 0x0, 0x0, 0xB};

I tried playing aroung with the parameters -mainly Read and Write sizes and offsets- but I fail to make it transmit all 32 bits of actual data.

Is there a way for the DMA to transmit all 32 bits from SCI?

Mysetup:

#define FRAME_TRANSFER 5

dmaCTRLPKT_RX.SADD = (uintptr_t) &(sciREG3->RD); /* source address */
dmaCTRLPKT_RX.DADD = (uintptr_t) shared_mem_p; /* destination address in shared RAM */
dmaCTRLPKT_RX.ELCNT = 1; /* element count */

dmaCTRLPKT_RX.CHCTRL = 0; /* (channel control) bufferId */
dmaCTRLPKT_RX.FRCNT = FRAME_LENGHT; /* frame count */
dmaCTRLPKT_RX.ELDOFFSET = 0; /* element destination offset */
dmaCTRLPKT_RX.ELSOFFSET = 0;
dmaCTRLPKT_RX.FRDOFFSET = 0; /* frame destination offset */
dmaCTRLPKT_RX.FRSOFFSET = 0; /* frame source offset */

dmaCTRLPKT_RX.PORTASGN = PORTB_READ_PORTA_WRITE;
dmaCTRLPKT_RX.RDSIZE = ACCESS_32_BIT;
dmaCTRLPKT_RX.WRSIZE = ACCESS_32_BIT;
dmaCTRLPKT_RX.TTYPE = FRAME_TRANSFER; /* transfer type */
dmaCTRLPKT_RX.ADDMODERD = ADDR_FIXED; /* address mode read */
dmaCTRLPKT_RX.ADDMODEWR = ADDR_INC1; /* address mode write */
dmaCTRLPKT_RX .AUTOINIT = AUTOINIT_OFF; /* autoinit

Cheers,
Arturo.

over 4 years ago

0 QJ Wang over 4 years ago

TI__Guru**** 197036 points

Hi Arturo,

From your code, the multi-buffer mode is not used, so the DMA requests is generated on a byte-per-byte basis.

If the transmitter transmits 0x03, 0xA4, and 0x5B, the SCI receiver should get the same data in RX register byte by byte (0x03, 0xA4, and 0x5B). But your DMA code will read the whole RX register, the data in destination should be 0x00000003, 0x000000A4, and 0x0000005B.

If the transmitter transmits 0x3, 0xA, 0x4, ...0xB, the data in the destination address is 0x0000003, 0x0000000A,...0x0000000B.

For SCI DMA, if the multi-buffer mode is not used, I suggest to use 1 byte for R/W side instead of 32-bit.

0 Arturo Apu Chinchilla over 4 years ago in reply to QJ Wang

Prodigy 10 points

QJ,

thanks for your rapid response. My example was not great but you got my point exactly.

It seems that multi-buffer mode is only present for the SCI/LIN interfaces (i.e. SCI1 and SCI2), can you confirm there is no way of using multi-buffer mode in SCI3 and SCI4?

Regards,
Arturo.

0 QJ Wang over 4 years ago in reply to Arturo Apu Chinchilla

TI__Guru**** 197036 points

Hi Arturo,

You are right. SCI3 and SCI4 don't support multi-buffered mode.

0 Arturo Apu Chinchilla over 4 years ago in reply to Arturo Apu Chinchilla

Prodigy 10 points

QJ,

for some reason I cannot reply to you answer below. Thank you for the clarification.

Back to the question, I tried using one byte instead of 32 bit in the access of both Read and Write, i.e:

    dmaCTRLPKT_RX.RDSIZE = ACCESS_8_BIT;
    dmaCTRLPKT_RX.WRSIZE = ACCESS_8_BIT;

I still get the DMA interrupt, but now the data is always zero; is something else needed to be changed in the configuation to use 1 byte access?

Regards,
Arturo.

+1 QJ Wang over 4 years ago in reply to Arturo Apu Chinchilla

TI__Guru**** 197036 points

Hello,

TMS570LC43x is a big endian device. The address offset of data field in SCIRD register is 0x37 (0x34 + 3) rather than 0x34.

0 Arturo Apu Chinchilla over 4 years ago in reply to QJ Wang

Prodigy 10 points

That worked as a charm. Thanks.

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TMS570LC4357: SCI via DMA only transmits one byte at a time