Other Parts Discussed in Thread: HALCOGEN
CORTEX-R4#33:
The errata states that (SPNZ195G, Rev - C) ,
This issue affects scan based debug utility developers. The end user should not be affected by this issue if the development tool vendor has implemented the workaround.
Depending on which of the conditions are met, the processor will either lose data or deadlock. If the processor deadlocks because of this issue it will still respond to interrupts provided they are not masked.
However one of previous thread, it has been confirmed from TI that, the issue is not handled in Code Composer Studio Version: 10.1.1.00004.
This leads to confusion, need help?
CORTEX-R4#57:
The workaround has been mentioned that to disable the "SPMAC" (Out-of-order FMACS control) in Secondary Auxiliary Control Register (DOOFMACS). By doing so there will be performance impact on SP-MAC operations. Could you provide some real time example for compiler generated assembly code.