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TMS570LS1224: Two Devices sharing one SPI chip select

SamS
Prodigy 50 points
Part Number: TMS570LS1224
Other Parts Discussed in Thread: HALCOGEN

Hi Experts,

Is it possible to share the SPI Chip select  by 2 different devices and still address them differently (since we are running out of chip select lines).

I found a note regarding in tech ref manual

this that it may be possible by way of Encoded chip select CSNR. 

What I need to do is to connect MIBSPI5NCS[0] chip select line to two different devices and

address them differently by way of chip select signal (may be encoded chip select signal? )

1. Is this possible?

2. Do I need to modify Halcogen code for it or Halcogen has direct support for it. But couldn't see Halcogen putting information for CSDEF register ? 

Regards

Sam

  • 0
    TI__Guru**** 197426 points

    Hi Sam,

    The two SPI devices should not share the same chip-select. You can use CS[0] for one device, and use one GIO pin for second SPI device. 

  • 0 in reply to QJ Wang
    Prodigy 50 points

    Hi Wang,

    Thank you for the reply. Currently we are doing it via the GIO pin and it looks fine. I was looking for a more efficient solution, since while using the GIO pin there are some CPU cycles wasted pulling the chip select low and high every time.

    I was looking for some efficient solution in terms  of chip select lines. That's is why I came across this portion in tech reference manual although I may have misunderstood that : 

    "To connect the SPI with encoded
    slaves devices, the CSNR field allows multiple active SPICS pins at the same time, which enables
    encoded chip selects from 0 to 16. To use encoded chip selects, all 6 chip select lines have to be
    connected to each slave device and each slave needs to have a unique chip-select address. The CSDEF
    register is used to provide the address at which slaves devices are all de-selected. Users can combine decoded and encoded chip selects. For example, n SPICS pins can be used for
    encoding an n-bit address and the remaining pins can be connected to decoded-mode slaves"

    Particularly the last line I understood as One SPI for example SPI5 chip select can be used to handle if everything is tied together to it and selected via CHIP SELECT.  Sorry If I have misunderstood it.

    Can you explain me what it means ?.

  • +1 in reply to SamS
    TI__Guru**** 197426 points

    Hi Sam,

    Do the SPI slave devices in your setup support more than one chip-select (CS) pins, and decode the encoded CS addresses? 

    In this mode, two chip-selects can support 3 SPI slave devices: CS[1:0] = [10],[01],[00]. Two chip-selects are connected to 3 SPI slave devices.  One SPI slave should be configured to be enabled by CS[1:0]=[00], the 2nd SPI slave device uses CS[1:0]=[01], and 3nd device uses CS[1:0]=[10]. To be honest, I didn't try this method to control several slave devices. But I used encoded CS addresses to select transfer groups (TG) in MibSPI mode, and it works fine. 

  • 0 in reply to QJ Wang
    Prodigy 50 points

    Hi Wang,

    Thank you for your reply. 

    Ok that means the slave devices should have the ability to decode the address and should support more than one Chip selects.  That is not available in the slave device. 

    Thank you for your clarification and support !