This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

pending Interrupt on external periodic pulse

Other Parts Discussed in Thread: TMS570LC4357

HW with CPU TMS570LC4357
 
We have a extern HW timer that generates a pulse every 5 ms on the GPIO pin Bit0.
 
After initialsation of CPU we
 - clear pending interrupt on GPIO pin Bit0  /* gioREG->FLG = 1U; */
 - enable irq interrupts                     /*   cpsie i */

Question 1.)
We saw that the interrupt sometimes is executed, direct after the pending interrupt is cleared and the irq is enabled, although no HW pulse is generated on GPIO Bit0 pin.  

Did we forget to initialise a register?

Question 2.)
Is it sufficient to clear pending interrupt (gioREG->FLG = 1U;) in the interrupt service routine?





SW startup code

I.) start  from reset

module            function:
res_sys_intvecs.asm    branch to res_start_bootstrap()

II.) start HW initialisation
module                    function:
res_startup.c                res_start_bootstrap();

    _res_core_init_core_registers();
    _res_core_init_stack_pointers();
    _res_core_init_ram();
    res_clk_both_plls();
    res_clk_setup_pll();
    res_clk_periph_init();
    res_lock_init_lock_step();
    res_pin_init_pin_multiplexer();
    res_rom_setup_flash();
    res_clk_trim_lpo();
    res_clk_map_clocks();
    res_clk_init_eclk();
    res_vim_init();
    res_excll_init();
    _res_mmu_init();
    _res_core_enable_cache();
    proc_main();

III.) start SW initialisation
module                    function:
proc_processes.c            proc_main()
    io_init(); /* Initialize of IO Driver component */

    /* do other stuff */

    /* Reset interruption flag. */
    io_gio_clear_sync_irq();             /* gioREG->FLG = 1U; */


    /* Enable IRQ - Clear I flag in CPS register */
    _res_core_enable_irq_interrupt();   /*   cpsie i */

    while (1)
    {
        /* Idle function */;
    }


IV.) Interrupt service routine
module                    function:
proc_interrupt_handler_sub.asm        _proc_int_handle_interrupt_subroutine

    proc_int_handle_interrupt_routine
    
V.) Sub call of interrupt service routine
module                    function:
proc_interrupt_handler.c        proc_int_handle_interrupt_routine
    /* Reset interruption flag. */
    io_gio_clear_sync_irq();       /* gioREG->FLG = 1U; */

    /* do other stuff */

  • Hello,

    If any bit in GIOOFF register is set before the GIO interrupt is enabled, clearing FLG register and GIOOFF register are needed. After the GIO interrupt is enabled, changing the interrupt pull up/down of the input pin might trigger the GIO interrupt.

    What does your io_init() do?

  • Thank you for for the information. We do not read GIOOFF. We have only one interrupt, therfore we did not read the GIOOFF. This seems to be the problem.

    In io_Init folowing register are set

        gioREG->GCR0   = 1U;
        gioREG->ENACLR = 0xFFU;
        gioREG->LVLCLR = 0xFFU;
        gioPORTA->DOUT = 0x00U;
        gioPORTA->DIR  = GIO_PORTADIR_CONFIGVALUE;
        gioPORTA->PDR  = GIO_PORTAPDR_CONFIGVALUE;
        gioPORTA->PSL  = GIO_PORTAPSL_CONFIGVALUE;
        gioPORTA->PULDIS  = GIO_PORTAPULDIS_CONFIGVALUE;
        gioPORTB->DOUT = 0x00U;
        gioPORTB->DIR  = GIO_PORTBDIR_CONFIGVALUE;
        gioPORTB->PDR  = GIO_PORTBPDR_CONFIGVALUE;
        gioPORTB->PSL  = GIO_PORTBPSL_CONFIGVALUE;
        gioPORTB->PULDIS  = GIO_PORTBPULDIS_CONFIGVALUE;
        gioREG->POL = GIO_POL_CONFIGVALUE;
        gioREG->LVLSET = GIO_LVLSET_CONFIGVALUE;
        gioREG->FLG = 0xFFU;
        gioREG->ENASET = GIO_INTENASET_CONFIGVALUE;

  • Your GIO configuration sequence looks fine to me. Is there other write to GIO registers after the GIO INT is enabled?

  • Yes, GIOA and GIOB are configed as following

    GIOA[ 0]   Input       this is the bit to interrupt-service  every 5 ms
    GIOA[ 2]   Output
    GIOA[ 3]   Output
    GIOA[ 4]   Output
    GIOA[ 5]   Output
    GIOA[ 6]   Input
    GIOA[ 7]   Input
                     
    GIOB[ 0]   Input
    GIOB[ 1]   Output
    GIOB[ 2]   Output
    GIOB[ 3]   Output
    GIOB[ 4]   Input
    GIOB[ 5]   Output
    GIOB[ 6]   Output
    GIOB[ 7]   Output

    read only with gioPORTA/B->DIN write with  gioPORTA/B->DCLR or gioPORTA/B->DSET

    But no actions on GIOA[ 0] 

  • Hi Reinhold,

    There is no problem in your configuration. I run the same test on TMS570LC43x launchpad for 30 minutes, and did not see this kind of issue. Did you use TI launchpad or your own PCB board? Would you please monitor the voltage level at GIOA[0] while performing the test? 

  • Hello Mr. Wang,

    I have examined  and found out, that the interrupt is executed with offset (gioREG->OFF1) 0 - 0 means "No interrupt is pending."

    I have no idea why the interrupt is executed.

  • Hi,

    The GIOOFF1 and GIOFLG are cleared when this register is read. The first instruction in GIO ISR reads GIOOFF1 register to clear the pending interrupt.

    Did you monitor the voltage level at GIOA[0]? 

  • Hi Reinhold,

    How do you start the external 5ms event that generate the interrupt, is it possible to hold that timer until your system has done initialization/enable interrupts?

    But, this may a similar issue we ran into with a timer interrupt where the (short) ISR gets double-triggered. It turns out that the write to clear of the peripheral interrupt flag was not really executed before updating CPS register due to execution pipelining/write cache? - interrupt was still pending and re-entered same ISR. Solved by just reading the timer INTFLG register right after the write-to-clear. Would not be an issue if the ISR had few more instructions.

    So, as QJ mentioned, if you are are reading GIOOFF1 that should have cleared the pending interrupt.

    Also try a read of GIOFLG right after write-to clear, before enabling IRQ during initialization, if you cannot control the async timer event during startup.

  • Hi Reinhold,

    Have you solved the problem? If yes, what causes the problem?