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TMS570LC4357: SPI Clock Questions

Mitchell
Expert 4915 points
Part Number: TMS570LC4357
Other Parts Discussed in Thread: HALCOGEN, LAUNCHXL2-570LC43

Hi Team,

My customer has some questions below:

  1. If I have the external clock and the SPI on the TMS running as a Master, would that be analogous to a free running clock on the SPI CLK line?
  2. In this mode, can the length of data we are receiving or reading form the buffer be dynamic ? We are looking to read about 64 bytes each transfer group.
  3. What is the length of the SPI RX buffer ?

Thanks,
Mitchell

  • 0
    TI__Guru**** 196306 points

    Hi Mitchell,

    Did you make MibSPI master work with a external clock? There are 128 TX buffers and 128 RX buffers for MibSPI2/3/4/5, and 256 TX buffers and 256 RX buffers for MibSPI1. The char length is 2 bit to 16 bits 

  • 0 in reply to QJ Wang
    TI__Expert 4915 points

    Hi QJ,

    No, they have checked this by setting CLKMOD = 0 and giving the TMS an external clock of 500 Khz. Test scenario: The TMS was programmed to continuously send data, they used a logic analyzer to observe the data on the bus. When they use the internal clock and disconnect the external clock, the same setup works and they see data on the SIMO line, but as soon as they enable the external clock, they stop seeing data on the SIMO line. Is there something else that has to be done to enable the use of the MIBSPI interface as master with an external clock ? They are using HALCOGEN for configuring the TMS to its required settings and this test is being performed on the Hercules launchpad LaunchXL2-570LC43.

  • 0 in reply to QJ Wang
    Prodigy 70 points

    Hey QJ, I tried this and did not work as mentioned by Mitchell. Can you suggest some other alternatives to try? As of now I have set the CLKMOD = 0 and give the external clock on MIBSPI3CLK.

  • 0 in reply to Sree P
    TI__Guru**** 196306 points

    Hi Sree,

    I did not make it work on my bench. I need to check with design guy.

  • 0 in reply to QJ Wang
    Prodigy 70 points

    Hey QJ, 

    Thanks for checking it on your bench. Please let me know once you have an update regarding it. Thanks !

  • 0 in reply to Sree P
    TI__Guru**** 196306 points

    Hi Sree,

    I am sorry that this feature is not implemented in this device. The master-mode SPI supports internal clock only.

  • 0 in reply to QJ Wang
    Prodigy 70 points

    Hey QJ, thanks for checking that, I would also like to inquire if I can make the SPI run at 12 - 24Mhz or around that range reliably using an internal clock ? and also if we can make that run as a free running clock ? Along the same lines as an alternative , can you suggest another chip that has all the features that the TMS57LC4357 has and includes the external clock for SPI feature.

  • 0 in reply to Sree P
    TI__Guru**** 196306 points

    Hi Sree,

    The maximum SPI clock is 25MHz. It is reliable within this range. Master-mode SPI supports internal clock only, but slave-mode SPI uses the external clock from SPI master.

    It doesn't support free-running. The SPI clock is only active when the master wants to send/receive data. In general a SPI transaction looks like.

    • The master asserts chip select.
    • The master generates clock signal. For Polarity=0 and Phase=0, data is output on the rising edge of SPICLK, and the input data is latche on the falling edge. 
    • The master deassets chip select to end the transaction.

    I don't know any other device on which the master-mode SPI supports external clock.