Other Parts Discussed in Thread: HALCOGEN
From the device memory map table (and same in device datasheet) in TRM, Could you help out, which TRM actually has the details on :
So for e.g., HalCoGen does access into that space as : #define SYS_EXCEPTION (*(volatile uint32 *)0xFFFFFFE4U)
Cannot find a TRM with details.. If this is ARM Cortex R arch spec or v7 general spec, still cannot see it..
