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TMS570LC4357: Strange data abort triggered by reading N2HET1 RAM in user level of MCU privileges

Jiri Dobry
Expert 1810 points
Part Number: TMS570LC4357

Hi,

we have a problem to read N2HET RAM with user level of privileges and we are not able to find why. PCR was completely open without limitation to eliminate it as source of problem. Read with system privileges level is OK.

Procesor aborts every time with exception "Sync external read, SD=1" "External" means some problem on bus controller, but everything looks OK.

Abort report values DFAR=FF4601C8  DFSR=00001008

Instruction is simple 32bit read "ldr.w r1, [r3, #456] ; 0x1c8" and r3=0xFF460000

There is no reason why MCU can't allow access without system privileges. 

NHET instruction measure time between two rising edges with clear on read and we are trying to read data part of this instruction.

EVENT_A1 WCAPE { control=ON,pin=DEF_SIG_A1,event=RISE,reg=NONE};
                    SUB { src1=A, src2=IMM, dest=NONE, data=DEF_TIMEOUT } ; 1
                    BR { event=N, cond_addr=L_CNT_B1 } ; 1
                    MOV32 { remote=L_CNT_A1, type=IMTOREG&REM, reg=NONE, data=0 } ; 1
                    MOV32 { remote=L_S4_CNT, type=IMTOREG&REM, reg=NONE, data=0 }

And this event can't be caused by processor MPU setting. Because it is "external" and we have proper MCU setting on this moment.

RGNR[0x0]: DRBAR=00000000 DRSR=0000F73F DRACR=00001100 shadow
RGNR[0x1]: DRBAR=08000000 DRSR=00000025 DRACR=00001203 intRAM ro
RGNR[0x2]: DRBAR=FF000000 DRSR=0000002F DRACR=00001200 peripherial ro
RGNR[0x3]: DRBAR=00000000 DRSR=00000000 DRACR=00000000
RGNR[0x4]: DRBAR=08000000 DRSR=00008021 DRACR=00001207 shared intRAM
RGNR[0x5]: DRBAR=08018000 DRSR=0000FF1D DRACR=00001203 shared end ovl
RGNR[0x6]: DRBAR=08000000 DRSR=0000801D DRACR=00001203 fw intRAM
RGNR[0x7]: DRBAR=00000000 DRSR=00000000 DRACR=00000000
RGNR[0x8]: DRBAR=08068000 DRSR=0000801D DRACR=00001303 ram1
RGNR[0x9]: DRBAR=64000000 DRSR=00000011 DRACR=00001300 extra Mpu
RGNR[0xA]: DRBAR=68000000 DRSR=00000011 DRACR=00001301 extra Mpu
RGNR[0xB]: DRBAR=FF440000 DRSR=00000023 DRACR=00001300 extra Mpu
RGNR[0xC]: DRBAR=FFF7B800 DRSR=00008811 DRACR=00001300 extra Mpu
RGNR[0xD]: DRBAR=08020000 DRSR=00000000 DRACR=00000003 stack protect
RGNR[0xE]: DRBAR=08025800 DRSR=0000F015 DRACR=00001303 stack
RGNR[0xF]: DRBAR=00000000 DRSR=0000002B DRACR=00000602 flash

and PCR3.PMPROTSET1 == 0

Any idea for this behavior?

  • 0
    TI__Guru**** 196306 points

    Hi,

    The NHET RAM can be access in both user and privileged mode. If PCR3.PMPROTSET1 is set, the NHET RAM can also be read in user mode.

  • 0 in reply to QJ Wang
    Expert 1810 points

    No. PCR3.PMPROTSET1 meaning is (TRM 2.5.3.2 Peripheral Memory Protection Set Register 1): 
    0 = The peripheral memory frame(n) can be written to and read from in both user and privileged modes.
    1 = The peripheral memory frame(n) can be written to only in privileged mode, but it can be read in both user and privileged modes.

    We are have 0 on related bit, it allow R/W. But we are not able to READ which must be possible in both cases. Strange.

  • 0 in reply to Jiri Dobry
    TI__Guru**** 196306 points

    Just tried. There is no problem for me to read the content from N2HET1 RAM in user mode:

    //Switch to user Mode (M = 10000)
    asm(" cps #16");
    asm(" mov lr, r0");
    asm(" mrs r1,cpsr");
    asm(" msr spsr_cxsf, r1");

    abc = *(uint32 *)(0xff460000);