Hi team,
I have a question related to esm registers.
As mentioned in TRM, ESM group-1 has 3 error status registers ESMSR1(Channel 0-31), ESMSR4(Channel 32-63) and ESMSR7(Channel 64-95).
It's clear that from esmreg SR1[3U], SR4[3U] and SR7[3U] represents the group 1. But what does the array size 3 indicate here?
Kindly provide clarification on this.
The HALCoGen created esmBASE_t structure in HL_reg_esm.h has the following, where the comments include the register offsets into the ESM Control Registers:
uint32 SR1[3U]; /* 0x0018, 0x001C, 0x0020 */
uint32 SR4[3U]; /* 0x0058, 0x005C, 0x0060 */
uint32 SR7[3U]; /* 0x0098, 0x009C, 0x00A0 */
And the TMS570LC43x 16/32 RISC Flash Microcontroller Technical Reference Manual (Rev. A) has:
So, the array size of 3 for SR1 represents:
However, the array size of 3 for SR4 and SR7 looks odd as means SR4[1], SR1[2], SR7[1] and SR7[2] refer to undefined ESM registers.
In the HALCoGen created HL_esm.c there are the following functions which take a group parameter and use it to index into SR7[]:
void esmClearStatusUpper(uint32 group, uint64 channels)
{
/* USER CODE BEGIN (33) */
/* USER CODE END */
esmREG->SR7[group] = (uint32)(channels & 0xFFFFFFFFU);
/* USER CODE BEGIN (34) */
/* USER CODE END */
}
uint64 esmGetStatusUpper(uint32 group, uint64 channels)
{
uint64 status;
uint32 ESM_ESTATUS7 = esmREG->SR7[group];
/* USER CODE BEGIN (41) */
/* USER CODE END */
/*SAFETYMCUSW 51 S MR:12.3 <APPROVED> "Needs shifting for 64-bit value" */
status = ((uint64)ESM_ESTATUS7) & channels;
/* USER CODE BEGIN (42) */
/* USER CODE END */
return status;
}
It looks confusing for the esmClearStatusUpper() and esmGetStatusUpper() to take the group argument, since the only valid value is zero.