TMS570LC4357: CAN_TX toggles at software reset

Koichiro Tashiro

Hi,

My customer reported a pulse is generated on DCAN TX signal when the module is reset by SWR bit in DCAN CTL register.
Please see below waveform.

Customer follows below sequence as recommended in TRM Table27-7 (and the original E2E thread).

The sequence is below:
1) Set Init bit
2) Set SWR bit
3) Wait until SWR gets 0. (The pulse is generated here)

Could you tell me how to avoid the pulse?

Thanks and regards,
Koichiro Tashiro

over 4 years ago

0 QJ Wang over 4 years ago

TI__Guru**** 200206 points

Hi Koichiro-san,

I didn't noticed this pulse before, but I will check if I can produce this pulse.

The pulse should not affect DCAN performance and the message transmission since the DCAN module is still in initialization mode.

1) Set Init bit
2) Set SWR bit

Did you wait for Init bit to get set before setting SWR bit?

0 Koichiro Tashiro over 4 years ago in reply to QJ Wang

TI__Mastermind 22945 points

Hi QJ,

QJ Wang said:
The pulse should not affect DCAN performance and the message transmission since the DCAN module is still in initialization mode.

According to customer, it is not true. The other side device detects the pulse and sends back an error.

QJ Wang said:
Did you wait for Init bit to get set before setting SWR bit?

Customer will check it and get back to us.

Thanks and regards,
Koichiro Tashiro

0 QJ Wang over 4 years ago in reply to Koichiro Tashiro

TI__Guru**** 200206 points

Ok, thanks.

0 Koichiro Tashiro over 4 years ago in reply to QJ Wang

TI__Mastermind 22945 points

Hi QJ,

Customer tried below, but the results was the same.

QJ Wang said:
Did you wait for Init bit to get set before setting SWR bit?

Thanks and regards,
Koichiro Tashiro

0 QJ Wang over 4 years ago in reply to Koichiro Tashiro

TI__Guru**** 200206 points

Thanks Koichiro-san. I will do my test later today.

0 QJ Wang over 4 years ago in reply to QJ Wang

TI__Guru**** 200206 points

Thanks Koichiro-san,

I just tested on TMS570LS12x board, but I didn't see the pulse. I will find LC43x HDK tomorrow, and do a test again.

uint32 i=0;
while(i==0){
canREG1->CTL |= 0x01;
while((canREG1->CTL & 0x01) != 0x1);

canREG1->CTL |= 0x8000;
while((canREG1->CTL & 0x8000) != 0x0000);

asm (" nop");
}

0 QJ Wang over 4 years ago in reply to QJ Wang

TI__Guru**** 200206 points

Hi Koichiro-san,

I captured the waveform of CAN_H and CAN_L when SW reset is generated.

This one dominant bit (1usecond) may be treated as the start of a message frame by other CAN nodes. After this bit, the CAN signal become recessive, and other nodes will transmit error frame after it detects a stuff error (more than five consecutive bits of the same level on the bus).

I am not sure if this CANTX/RX toggle behavior during CAN-module software reset is the feature or a bug.

0 Koichiro Tashiro over 4 years ago in reply to QJ Wang

TI__Mastermind 22945 points

Hi QJ,

Could you provide workaround to avoid this behavior?

Thanks and regards,
Koichiro Tashiro

0 QJ Wang over 4 years ago in reply to Koichiro Tashiro

TI__Guru**** 200206 points

Hi Koichiro-san,

SWR resets the DCAN core and the value of DCAN config registers as well. I tried several things GIO mode, silent mode, etc), I could not find a workaround to avoid the TX pin's toggling.