TMS570LC4357: HALCoGen GCM CLK configure

Hi HL,

You should be able to change the VCLK3 divider on the GUI. The VCLK3 is a clock divided down from HCLK, ad it can be HCLK/1,/2,.../16. 

The VCLK3 is the clock source for EMIF, ECAPx, ePWMx, Ethernet and eQEP modules.

Which version of HALCoGen are you using? The latest one is 4.07.01. 

GCLK: R5F CPU clock frequency

HCLK: system clock frequency

VCLK: primary peripheral clock frequency

VCLK2: Secondary peripheral clock frequency

VCLK3: Secondary peripheral clock frequency

VCLKA1 - Primary asynchronous peripheral clock frequency

VCLKA2 - Secondary asynchronous peripheral clock frequency

VCLKA4 - Secondary asynchronous peripheral clock frequency

You can use the default settings. The default value for VCLK3 is HCLK/(1+1) = 150/2=75MHz which is a valid range (<110MHz).