TM4C1294 configuring an SPI FSS chip select using a GPIO pin

I do not see the part number I put in,

I am talking about the TM4C1294NCPDT

Thanks

As i am using the loopback example (SSI1 - slave, SSI0 - master) I write first from the slave and then from the master

as in the example beneeth - nothing is seen on the MISO line, only on the MOSI.

for(ui32Index = 0; ui32Index < 2 ; ui32Index++)
{

MAP_GPIOPinWrite(GPIO_PORTD_BASE,GPIO_PIN_4, 0);
MAP_SSIDataPut(SSI1_BASE, pui32DataTx1[ui32Index]);
MAP_SSIDataPut(SSI0_BASE, pui32DataTx[ui32Index]);
for(jj=0; jj<22;jj++);//wait - needed
MAP_GPIOPinWrite(GPIO_PORTD_BASE,GPIO_PIN_4, GPIO_PIN_4);

}

if I add another - MAP_SSIDataPut(SSI1_BASE, pui32DataTx1[0]); line before the above i get only the second array value.

Meaning , I send one word from slave then a word frome master (no response from slave)

then another word from slave and the first slave sent value is seen.

how can I have a slave answer on the first master sent value too?

Hi,

 You need to wait until the transmission is complete before de-asserting the chip select to high. I modified the example to use GPIOA3 for chip select and it works for me. 

    for(ui32Index = 0; ui32Index < NUM_SSI_DATA; ui32Index++)
    {

    	MAP_GPIOPinWrite(GPIO_PORTA_BASE,GPIO_PIN_3, 0);


        //
        // Prepare data to send from the slave.
        //
        MAP_SSIDataPut(SSI1_BASE, pui32DataTx1[ui32Index]);

        //
        // Send the data using the "blocking" put function.  This function
        // will wait until there is room in the send FIFO before returning.
        // This allows you to assure that all the data you send makes it into
        // the send FIFO.
        //
        MAP_SSIDataPut(SSI0_BASE, pui32DataTx[ui32Index]);

        while (SSIBusy(SSI0_BASE));
    	MAP_GPIOPinWrite(GPIO_PORTA_BASE,GPIO_PIN_3, GPIO_PIN_3);

    }

Sorry, I also see 0 on the SOMI. Let me take a look. 

Ok, I got it working. See below snippet of code. Looks like we need to fill the slave TXFIFO with the data first before receiving the clock from the master. The way it was before, the slave TXFIFO has no data yet at the time when it receives the SPICLK from the master. Therefore, it transmits 0 instead. I think this is matching the datasheet description. Just make sure there is already some data in the slave TXFIFO before the master sends the clock. 

17.3.2.1 Transmit FIFO
The common transmit FIFO is a 16-bit wide, 8-locations deep, first-in, first-out memory buffer. The
CPU writes data to the FIFO by writing the SSI Data (SSIDR) register (see page 1249), and data is
stored in the FIFO until it is read out by the transmission logic.
When configured as a master or a slave, parallel data is written into the transmit FIFO prior to a
legacy SSI serial conversion and transmission to the attached slave or master, respectively, through
the SSInDAT0/SSInTX pin.
In slave mode, the legacy SSI transmits data each time the master initiates a transaction. If the
transmit FIFO is empty and the master initiates, the slave transmits the 8th most recent value in the
transmit FIFO. If less than 8 values have been written to the transmit FIFO since the SSI module
clock was enabled using the Rn bit in the RCGCSSI register or if the QSSI is reset using the SRSSI
register, then 0 is transmitted. Care should be taken to ensure that valid data is in the FIFO as
needed. The QSSI can be configured to generate an interrupt or a μDMA request when the FIFO
is empty.

    //
    // Initialize the data to send.
    //
    pui32DataTx[0] = 'T';
    pui32DataTx[1] = 'I';
    pui32DataTx[2] = 'V';
    pui32DataTx[3] = 'A';
    pui32DataTx1[0] = 'Q';
    pui32DataTx1[1] = 'S';
    pui32DataTx1[2] = 'S';
    pui32DataTx1[3] = 'I';


    //
    // Display indication that the SSI0/SSI1 is transmitting data.
    //
    UARTprintf("SSI0 Sent:\n  ");
    UARTprintf("'T' 'I' 'V' 'A' \n");
    UARTprintf("SSI1 Sent:\n  ");
    UARTprintf("'Q' 'S' 'S' 'I' \n");

    //
    // Send 4 bytes of data.
    //
    for(ui32Index = 0; ui32Index < NUM_SSI_DATA; ui32Index++)
    {

        //
        // Fill the slave FIFO with 4 data
        //
        MAP_SSIDataPut(SSI1_BASE, pui32DataTx1[ui32Index]);

    }

    //
    // Send 4 bytes of data.
    //
    for(ui32Index = 0; ui32Index < NUM_SSI_DATA; ui32Index++)
    {

    	MAP_GPIOPinWrite(GPIO_PORTA_BASE,GPIO_PIN_3, 0);

        //
        // Prepare data to send from the slave.
        //
//        MAP_SSIDataPut(SSI1_BASE, pui32DataTx1[ui32Index]);

        //
        // Send the data using the "blocking" put function.  This function
        // will wait until there is room in the send FIFO before returning.
        // This allows you to assure that all the data you send makes it into
        // the send FIFO.
        //
        MAP_SSIDataPut(SSI0_BASE, pui32DataTx[ui32Index]);

        while (SSIBusy(SSI0_BASE));
    	MAP_GPIOPinWrite(GPIO_PORTA_BASE,GPIO_PIN_3, GPIO_PIN_3);

    }