TMS570LC4357: Causing errors on re-Configuring the MPU regions

Parth Rastogi

Hi,

On TMS570LC4357 at power-up, we are configuring PLL and MPU regions as per our memory requirements and we are able to successfully configure them. But when we jump from Boot to Application we have to re-configure the MPU as per the application requirements.

Below is the sequence of initialization in Boot:

Core Register Initialization
Initialize Stack Pointer
Initialize L2 RAM
System Initialization
Configure IRQ offsets
Initialize VIM table
Initialize ESM group1
SystemClock Initialization
MPU Initialization

And below is the sample snippet code for configuring the MPU regions:

mpuInit_
; Disable mpu
mrc p15, #0, r0, c1, c0, #0
bic r0, r0, #1
dsb
mcr p15, #0, r0, c1, c0, #0
isb
; Disable background region
mrc p15, #0, r0, c1, c0, #0
bic r0, r0, #0x20000
mcr p15, #0, r0, c1, c0, #0
; Setup region 1
mov r0, #0
mcr p15, #0, r0, c6, c2, #0
ldr r0, r1Base
mcr p15, #0, r0, c6, c1, #0
mov r0, #0x0008
orr r0, r0, #0x1000
mcr p15, #0, r0, c6, c1, #4
movw r0, #((1 << 15) + (1 << 14) + (1 << 13) + (1 << 12) + (1 << 11) + (1 << 10) + (1 << 9) + (1 << 8) + (0x1F << 1) + (1))
mcr p15, #0, r0, c6, c1, #2

A similar sequence of StartUp initializations is followed when the application is launched. The boot is able to successfully configure the MPU and launch the application but, when the application starts initializing the MPU we are getting exceptions when the 'dsb' instruction is executed while disabling the MPU.

Please let me know if we are missing any requirements while initializing the MPU.

Thanks & Regards,

Parth

over 4 years ago

0 QJ Wang over 4 years ago

TI__Guru**** 199296 points

Hi Parth,

The initialization sequence is correct. Is it data abort or prefetch abort? Please refer to this page to debug the exceptions:

http://software-dl.ti.com/hercules/hercules_docs/latest/hercules/FAQ/FAQ.html#troubleshooting-abort-exceptions

0 Parth Rastogi over 4 years ago in reply to QJ Wang

Prodigy 51 points

Hi Wang,

Thanks for the reply.

We are getting a data abort exception while re-initialization of MPU through the application.

Thanks,

Parth

QJ Wang

0 QJ Wang over 4 years ago in reply to Parth Rastogi

TI__Guru**** 199296 points

Hi Parth,

I did a test:

1. Enable MPU

2. Disable MPU

3. Re-enable MPU

It works fine. I didn't see any issue.

Memory region control read and write access is permitted only from Privileged modes. Is your application in user mode?

0 Parth Rastogi over 4 years ago in reply to QJ Wang

Prodigy 51 points

Hi Wang,

I also debugged the application code and just before getting the exception the application is in "System Mode". After executing of 'dsb' instruction, I am getting data abort exception. Please refer to the attached snips for your reference:

Please provide your response, as we are blocked due to this issue.

Regards,

Parth

QJ Wang

0 QJ Wang over 4 years ago in reply to Parth Rastogi

TI__Guru**** 199296 points

Hi Parth,

I will do a test using bootloader and application. Come back to you tomorrow.

0 QJ Wang over 4 years ago in reply to QJ Wang

TI__Guru**** 199296 points

Just did a test with uart bootloader.

1. The MPU is enabled in the bootloader. It called _mpuInit_() in _c_int00()

2. The Application is located from 0x200020, the _mpuInit_() is called twice: _c_int00_() and main()

3. After system reset, the code jump from bootloader to application, I did not see any issue.

can you share your _mpuInit_() used in your bootloader?

0 Parth Rastogi over 4 years ago in reply to QJ Wang

Prodigy 51 points

Hi Wang,

I also did the same configurations for initializing the MPU on Boot and Application. The Boot is able to initialize the MPU properly but when control jumps to application, and there we are re-initializing the MPU then it's not able to initialize properly and getting data abort exception.

Below is the sample snippet code for configuring the MPU regions on both Boot and Application:

_mpuInit_
; Disable mpu
mrc p15, #0, r0, c1, c0, #0
bic r0, r0, #1
dsb
mcr p15, #0, r0, c1, c0, #0
isb
; Disable background region
mrc p15, #0, r0, c1, c0, #0
bic r0, r0, #0x20000
mcr p15, #0, r0, c1, c0, #0
; Setup region 1
mov r0, #0
mcr p15, #0, r0, c6, c2, #0
ldr r0, r1Base
mcr p15, #0, r0, c6, c1, #0
mov r0, #0x0008
orr r0, r0, #0x1000
mcr p15, #0, r0, c6, c1, #4
movw r0, #((1 << 15) + (1 << 14) + (1 << 13) + (1 << 12) + (1 << 11) + (1 << 10) + (1 << 9) + (1 << 8) + (0x1F << 1) + (1))
mcr p15, #0, r0, c6, c1, #2
; Setup region 2
mov r0, #1
mcr p15, #0, r0, c6, c2, #0
ldr r0, r2Base
mcr p15, #0, r0, c6, c1, #0
mov r0, #0x0002
orr r0, r0, #0x0600
mcr p15, #0, r0, c6, c1, #4
movw r0, #((0 << 15) + (0 << 14) + (0 << 13) + (0 << 12) + (0 << 11) + (0 << 10) + (0 << 9) + (0 << 8) + (0x15 << 1) + (1))
mcr p15, #0, r0, c6, c1, #2
; Setup region
mov r0, #2
mcr p15, #0, r0, c6, c2, #0
ldr r0, r3Base
mcr p15, #0, r0, c6, c1, #0
mov r0, #0x0002
orr r0, r0, #0x1300
mcr p15, #0, r0, c6, c1, #4
movw r0, #((0 << 15) + (0 << 14) + (0 << 13) + (0 << 12) + (0 << 11) + (0 << 10) + (0 << 9) + (0 << 8) + (0x12 << 1) + (1))
mcr p15, #0, r0, c6, c1, #2
; Setup region 4
mov r0, #3
mcr p15, #0, r0, c6, c2, #0
ldr r0, r4Base
mcr p15, #0, r0, c6, c1, #0
mov r0, #0x0010
orr r0, r0, #0x1200
mcr p15, #0, r0, c6, c1, #4
movw r0, #((0 << 15) + (0 << 14) + (0 << 13) + (0 << 12) + (0 << 11) + (0 << 10) + (0 << 9) + (0 << 8) + (0x16 << 1) + (1))
mcr p15, #0, r0, c6, c1, #2
; Setup region 5
mov r0, #4
mcr p15, #0, r0, c6, c2, #0
ldr r0, r5Base
mcr p15, #0, r0, c6, c1, #0
mov r0, #0x0010
orr r0, r0, #0x1300
mcr p15, #0, r0, c6, c1, #4
movw r0, #((0 << 15) + (0 << 14) + (0 << 13) + (0 << 12) + (0 << 11) + (0 << 10) + (0 << 9) + (0 << 8) + (0x1A << 1) + (1))
mcr p15, #0, r0, c6, c1, #2
; Setup region 6
mov r0, #5
mcr p15, #0, r0, c6, c2, #0
ldr r0, r6Base
mcr p15, #0, r0, c6, c1, #0
mov r0, #0x0001
orr r0, r0, #0x0300
mcr p15, #0, r0, c6, c1, #4
movw r0, #((0 << 15) + (0 << 14) + (0 << 13) + (0 << 12) + (0 << 11) + (0 << 10) + (0 << 9) + (0 << 8) + (0x0A << 1) + (1))
mcr p15, #0, r0, c6, c1, #2
; Setup region 7
mov r0, #6
mcr p15, #0, r0, c6, c2, #0
ldr r0, r7Base
mcr p15, #0, r0, c6, c1, #0
mov r0, #0x0002
orr r0, r0, #0x0300
mcr p15, #0, r0, c6, c1, #4
movw r0, #((0 << 15) + (0 << 14) + (0 << 13) + (0 << 12) + (0 << 11) + (0 << 10) + (0 << 9) + (0 << 8) + (0x14 << 1) + (1))
mcr p15, #0, r0, c6, c1, #2
; Setup region 8
mov r0, #7
mcr p15, #0, r0, c6, c2, #0
ldr r0, r8Base
mcr p15, #0, r0, c6, c1, #0
mov r0, #0x0010
orr r0, r0, #0x1200
mcr p15, #0, r0, c6, c1, #4
movw r0, #((0 << 15) + (0 << 14) + (0 << 13) + (0 << 12) + (0 << 11) + (0 << 10) + (0 << 9) + (0 << 8) + (0x12 << 1) + (1))
mcr p15, #0, r0, c6, c1, #2
; Setup region 9
mov r0, #8
mcr p15, #0, r0, c6, c2, #0
ldr r0, r9Base
mcr p15, #0, r0, c6, c1, #0
mov r0, #0x0006
orr r0, r0, #0x1200
mcr p15, #0, r0, c6, c1, #4
movw r0, #((0 << 15) + (0 << 14) + (0 << 13) + (0 << 12) + (0 << 11) + (0 << 10) + (0 << 9) + (0 << 8) + (0x04 << 1) + (0))
mcr p15, #0, r0, c6, c1, #2
; Setup region 10
mov r0, #9
mcr p15, #0, r0, c6, c2, #0
ldr r0, r10Base
mcr p15, #0, r0, c6, c1, #0
mov r0, #0x000C
orr r0, r0, #0x1300
mcr p15, #0, r0, c6, c1, #4
movw r0, #((0 << 15) + (0 << 14) + (0 << 13) + (0 << 12) + (0 << 11) + (0 << 10) + (0 << 9) + (0 << 8) + (0x04 << 1) + (0))
mcr p15, #0, r0, c6, c1, #2
; Setup region 11
mov r0, #10
mcr p15, #0, r0, c6, c2, #0
ldr r0, r11Base
mcr p15, #0, r0, c6, c1, #0
mov r0, #0x0006
orr r0, r0, #0x0600
mcr p15, #0, r0, c6, c1, #4
movw r0, #((0 << 15) + (0 << 14) + (0 << 13) + (0 << 12) + (0 << 11) + (0 << 10) + (0 << 9) + (0 << 8) + (0x04 << 1) + (0))
mcr p15, #0, r0, c6, c1, #2
; Setup region 12
mov r0, #11
mcr p15, #0, r0, c6, c2, #0
ldr r0, r12Base
mcr p15, #0, r0, c6, c1, #0
mov r0, #0x0006
orr r0, r0, #0x1600
mcr p15, #0, r0, c6, c1, #4
movw r0, #((0 << 15) + (0 << 14) + (0 << 13) + (0 << 12) + (0 << 11) + (0 << 10) + (0 << 9) + (0 << 8) + (0x04 << 1) + (0))
mcr p15, #0, r0, c6, c1, #2
; Setup region 13
mov r0, #12
mcr p15, #0, r0, c6, c2, #0
ldr r0, r13Base
mcr p15, #0, r0, c6, c1, #0
mov r0, #0x0006
orr r0, r0, #0x1600
mcr p15, #0, r0, c6, c1, #4
movw r0, #((0 << 15) + (0 << 14) + (0 << 13) + (0 << 12) + (0 << 11) + (0 << 10) + (0 << 9) + (0 << 8) + (0x04 << 1) + (0))
mcr p15, #0, r0, c6, c1, #2
; Setup region 14
mov r0, #13
mcr p15, #0, r0, c6, c2, #0
ldr r0, r14Base
mcr p15, #0, r0, c6, c1, #0
mov r0, #0x0006
orr r0, r0, #0x1600
mcr p15, #0, r0, c6, c1, #4
movw r0, #((0 << 15) + (0 << 14) + (0 << 13) + (0 << 12) + (0 << 11) + (0 << 10) + (0 << 9) + (0 << 8) + (0x04 << 1) + (0))
mcr p15, #0, r0, c6, c1, #2
; Setup region 15
mov r0, #14
mcr p15, #0, r0, c6, c2, #0
ldr r0, r15Base
mcr p15, #0, r0, c6, c1, #0
mov r0, #0x0006
orr r0, r0, #0x1600
mcr p15, #0, r0, c6, c1, #4
movw r0, #((0 << 15) + (0 << 14) + (0 << 13) + (0 << 12) + (0 << 11) + (0 << 10) + (0 << 9) + (0 << 8) + (0x04 << 1) + (0))
mcr p15, #0, r0, c6, c1, #2
; Setup region 16
mov r0, #15
mcr p15, #0, r0, c6, c2, #0
ldr r0, r16Base
mcr p15, #0, r0, c6, c1, #0
mov r0, #0x0010
orr r0, r0, #0x1200
mcr p15, #0, r0, c6, c1, #4
movw r0, #((0 << 15) + (0 << 14) + (0 << 13) + (0 << 12) + (0 << 11) + (0 << 10) + (0 << 9) + (0 << 8) + (0x12 << 1) + (0))
mcr p15, #0, r0, c6, c1, #2

; Enable mpu
mrc p15, #0, r0, c1, c0, #0
orr r0, r0, #1
dsb
mcr p15, #0, r0, c1, c0, #0
isb
bx lr

And, Can you please share your workspace and code what you have created to test this scenario.

Thanks & Regards,

Parth

0 QJ Wang over 4 years ago in reply to Parth Rastogi

TI__Guru**** 199296 points

Hi Parth,

have you resolved your issue? As I said, I was not able to produce the issue.

0 QJ Wang over 4 years ago in reply to QJ Wang

TI__Guru**** 199296 points

Attached are the UART bootloader and Application image used in my test:

TMS570LSx_rtiBlinky_BL_APP200020.zip 8360.TMS570LC4357_UART_BootLoader.zip

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TMS570LC4357: Causing errors on re-Configuring the MPU regions