MSTGCR register, MSTGENA says Memory self-test controller is enabled when Ah is written. Same register Note says " It is recommended that a value of Ah be used to disable the memory self-test
controller. This value will give maximum protection from a bit flip inducing event that would inadvertently enable the controller"
Could you please confirm which one is correct note or MSTGENA (0-3) value. I believe 0xA only correct to enable as PBIST section mention to use 0xAh to enable.
