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TMS570LC4357: question about SPNU563A

Ray Vincent Aranzaso
Mastermind 18180 points
Part Number: TMS570LC4357

Hi,

Good Day. I have a customer who is working with TMS570LC4357. Please see below his query for your reference. Thank you very much.

In SPNU563A (TMS570LC43x TRM) §9.5.2, it is said that DLR register bit 3 shall not be changed from its default value of 1.
What is the operational impact if this bit is set to 0 by software during PBIST procedure?

Best Regards,

Ray Vincent

  • 0
    TI__Guru**** 197156 points

    Hello Ray,

    The bit 2 is to enable the ROM-based testing mode, and bit 4 enabled the CPU to access the PBIST.

    The bit 3 is reserved which is used internally for diagnostic. When this bit is cleared, the pbist done and pbist fail are driven from the external ATE interface.