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TMS570LS3137: Dual CPUs Running in Lockstep

Part Number: TMS570LS3137

Dear team,

I saw Dual CPUs Running in Lockstep in TRM.

Do we have any document about  Dual CPUs Lockstep?

How does the dual-ARM Cortex-R4F CPU achieve synchronization?

How does the Cortex-R4F CPU comparison module (CCM-R4F) respond to errors to re-achieve dual-core synchronization?

What are the indicators of synchronization that can be achieved?

Susan

 

  • Hi Susan,

    The two processors are initialized to the same state during system start-up, and they receive the same inputs, so during normal operation the state of the two processors is identical from clock to clock.

    An error in either processor will cause a difference between the states of the two processors, which will eventually be manifested as a difference in the outputs. The CCM-R4F module monitors the outputs of the two processors and flags an error in the case of a discrepancy.

    Not all internal registers of the Cortex-R4F CPU have fixed values upon reset. To avoid an erroneous CCMR4F compare error, the application software needs to ensure that the CPU registers of both CPUs are initialized with the same values before the registers are used, including function calls where the register values are pushed onto the stack.