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TMS570LC4357: How to investigate CPU Interconnect global error issues

Nicolas-1
Prodigy 20 points
Part Number: TMS570LC4357
Other Parts Discussed in Thread: HALCOGEN

Hi Support,

The MCU TMS570LC4357 generates CPU Interconnect global errors (ESM Group1, channel 52) that seem to be intermittent and random. Sometimes it takes up to 2 hours before to observe this behavior and some other times only few seconds after a power up.

The Interconnect status registers info are:
1. SDC Status Register = GLOBAL_ERROR bit set
2. Error Transaction ID Register = bit 4 set = Cortex-R5F CPU master.
3. Error Transaction Signature Register = bit 4 set = Cortex-R5F CPU master.

I know there is an silicon errata (DEVICE#49 False interconnect safety checker error flag) related to this kind of problems, but it does not help to solve the problem. The MPU is used and configured in a way that the entire memory from 0x0 to 0xFFFFFFFF is set to NORMAL, NOEXEC and then, the only memory that is configured as NORMAL and EXEC is the internal MCU flash memory from 0x0 to 0x003FFFFF. No other region is configured as NORMAL and EXEC. So far, the errata workaround is not working for us.

My questions are:

1. How to analyze deeper the root cause ?

2. How to know which memory access is causing the problem ?

3. How to know if it is a true or false interconnect issue ?

Regards,

Nicolas

  • 0
    TI__Guru**** 197036 points

    Hi Nicolas,

    The interconnect has built in hardware checker. Every transaction issued by the CPU onto the interconnect is being monitored by the the hardware checker. The error is showing that a mismatch is detected.

    To be honest, I haven't produced this error on my bench using LC43 launchpad. 

  • 0 in reply to QJ Wang
    Prodigy 20 points

    Hi QJ,

    Is there any registers (other than interconnect) that might help to better understand the problem ? Our system is complex and we are using multiple modules in the MCU i.e. Flash, Sram, Emif, Cache, N2het, Eqep, Emac, Mii, Gio, Adc, Spi, I2c, Pwm, etc.  Do yo have any advice where to start to look at ?

    Regards,

    Nicolas

  • 0 in reply to Nicolas-1
    TI__Guru**** 197036 points

    Hi Nicolas,

    Is the error generated during start-up or during the runtime of your application? Is it possible to narrow down which peripheral or what kind of operation causes this issue?

    You can enable the interrupt for ESM 1.52, then add a breakpoint or while(1) in the ISR. When the code jump the ISR, check the R14_IRQ to figure out which instruction causes this exception. 

  • 0 in reply to QJ Wang
    Prodigy 20 points

    Hi QJ,

    The problem occurs during the runtime of our application. So far it's seem to be related to MDIO read access (Halcogen function MDIOPhyRegRead()). The MCU read/write to an IP switch using the MDIO and MII interfaces. I will try to narrow it down as much as I can.

    Thanks,

    Nicolas

  • 0 in reply to Nicolas-1
    TI__Guru**** 197036 points

    Hi Nicolas,

    I am sorry for late response. Have you resolved the issue?

  • 0 in reply to QJ Wang
    Prodigy 20 points

    Each time the problem occurs it seems to be on a different line of code. So I have no clue really. I still have to dig more. Thanks.