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Original question:

TMS570LS3137: EMAC stall issue at High Data Rates

RM57L843: EMAC stall issue at High Data Rates

Bence Reucsán
Prodigy 25 points
Part Number: RM57L843


Hi,

I have the same problem as the user here: https://e2e.ti.com/support/microcontrollers/arm-based-microcontrollers-group/arm-based-microcontrollers/f/arm-based-microcontrollers-forum/829899/tms570ls3137-emac-stall-issue-at-high-data-rates?tisearch=e2e-sitesearch&keymatch=EMAC_BUF_DESC_OWNER#

This question was not answered fully. Does somebody from TI has a proper solution?

Thank you,

Bence

  • 0
    TI__Guru**** 199016 points

    Hi Bence,

    As IDing suggested: 

    1) increase the pBuf from 10 to a bigger one,

    2) use the internal RAM for the pBuf

    3) modify the EMAC driver Rx ISR code to immediately release the pBuf.

    Have you tried those suggestions?

  • 0 in reply to QJ Wang
    Prodigy 25 points

    Hi QJ Wang,

    Thank you for your fast reply.

    1: I don't believe that this is a proper solution rather it only makes the FW crash at even higher data rates.

    2: I'm already using the internal RAM of the MCU. (It's the TI RM57L843BZWTT (Hercules) MCU.)

    3: Could you please elaborate on how to exactly do that? The LWIP port created by TI for the Hercules MCU was designed in a way that the whole LWIP stack runs in interrupt context. (Please see this post for more details: https://e2e.ti.com/support/archive/stellaris_arm/f/stellaris-arm-lm3s-microcontrollers-read-only-archived-forum/284029/why-is-all-lwip-processing-done-in-ethernet-interrupt-context     "I would think it would be far simpler to design the system to handle transmit and receive pbufs from the Ethernet interrupt only and the rest of the processing done in the "main loop".  This is what I have been accustomed to in embedded systems." )

    In the current implementation of the EMAC RX interrupt handler, the "ethernet_input" function of the LWIP is called in the "middle" of the IRQ handler, and only when the LWIP processing is done (IP + TCP/UDP, plus mbedTLS in my case), the pbufs are released. So it would take a serious amount of time and energy to modify the whole system (EMAC config and IRQ, DMA handling, LWIP low level).

    Maybe TI has some fixes/upgrades after these 8 years?

    Thank you for your help.

    Best regards,
    Bence

  • 0 in reply to Bence Reucsán
    TI__Guru**** 199016 points

    Hi Bence,

    We provide the LWIP example AS IS. There is no update from then, and we don't have plan to update the LWIP demo and examples. I am sorry for that.