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TMS570LS1224: Clocks related (oscillator and PLL) fault response: reset SYSESR[14]:OSCRST OR ESM group1 fault

Marcus Coxon
Prodigy 250 points

Part Number: TMS570LS1224

This question relates to how the TMS570 responds to clock related (oscillator and PLL) faults; in particular, I'm interested in the fact that there appears to be two different reporting mechanism:

  • Via reset as reported by SYSESR
  • Via ESM Group1 Channels 10, 11 & 42

I understand from the TRM, that resets (as reported via SYSESR[14]:OSCRST) only occur if enabled by the PLLCTL1 reg; that much is clear, but what about the ESM Group1 faults, are these only generated if resets are not enabled?

  • 0
    TI__Guru**** 200976 points

    Hi Marcus,

    The TMS570 devices have built-in OSC monitor (CLKDET) and PLL slip detector. 

    When OSC failed, the GCM clock source is switched to HF LPO. The OSCFAIL flag is set and ESM 1.11 is also set. If PLLCTL1.23 is set, the device reset is generated.

    When PLL slip occurs, if BPOS[1:0] (PLLCTL1[30:29]) is enabled (=00 or 11), ESM flag is set, and GCM clock source is switched to OSC. If ROS is also set, the device reset is also generated.

  • 0 in reply to QJ Wang
    Prodigy 250 points

    Hi QJ, thanks for the update.  Just a couple of clarifications:

    1. Re PLL slip, when you stated "ESM flag is set", which flag in particular were you referring to?  I note that there are two PLL related Group1 fault channels, ESM 1.10 (PLL1 - Slip) and 1.42 (PLL#2 - Slip); how does that work - sorry, a bit of an open question?
    2. I'm a little confused by your suggested values for BPOS (aka MASK_SLIP): you state that action is taken ("enabled") when BPOS is "=00 or 11" (2 bit binary) but the TRM, Table 2-44 (PLLCTL1)) states that anything other than 2h (2 bit binary 10) enables action on slip, i.e. action is enabled by 2 bit binary = 00, 01 or 11.

    Marcus

  • 0 in reply to Marcus Coxon
    TI__Guru**** 200976 points

    Hi Marcus,

    1. If PLL1 is used, the PLL slip will set ESM 1.10. To recover from a PLL failure, please follow the recovery procedure listed in TRM.

    2. You are correct. The BPOS is enabled when BPOS[1:0]=00b, 01b, or 11b  -->ESM flag is set, GCM clock source is switched to OSCIN

                                   The BPOS is disabled when BPOS[1:0]=10b

  • 0 in reply to QJ Wang
    Prodigy 250 points

    Hi QJ, thanks for the clarification.

    Marcus