TMS570LS3137: MCU Register Information

Hi Eyup,

Where did you get those names? There is interrupt status register for some peripherals, but I don't remember any interrupt state register. 

Hi QJ Wang,

Values are required to use the Trace feature on the Segger Pro device. I want to do real time analysis from Segger Systemview V3.30 software. I couldn't find any configuration file for ARM Cortex-R4F MCU family. That's why I'm trying to ensure compatibility using configurations prepared for the ARM Cortex-M0 family.

Register identification address: \\SEGGER\SystemView\Src\Sample\embOS\Config\Cortex-M0\SEGGER_SYSVIEW_Config_embOS_CM0

Related Code:

#define SCB_ICSR  (*(volatile U32*) (0xE000ED04uL))  // Interrupt Control State Register
#define SCB_ICSR_PENDSTSET_MASK     (1UL << 26)      // SysTick pending bit
#define SYST_RVR  (*(volatile U32*) (0xE000E014uL))  // SysTick Reload Value Register
#define SYST_CVR  (*(volatile U32*) (0xE000E018uL))  // SysTick Current Value Register

Best Regards,

Eyup SAYIN said:

That's why I'm trying to ensure compatibility using configurations prepared for the ARM Cortex-M0 family.

Section 4.6.4.1 Cortex-A/R Event timestamp of SEGGER SystemView User Guide contains:

The Cortex-A and Cortex-R cycle counter is implemented only as part of the Performance Monitor Extension and might not always be accessible. Cortex-A and Cortex-R do not have a generic system timer source, like the Cortex-M SysTick, either.

I.e. any reference to SysTick isn't relevant to the TMS570LS3137 Cortex-R based device.

I don't have a license  for SystemView and so haven't attempted to configure it for Cortex-R devices.

Is the information in the SystemView User Guide about configuring for use on Cortex-R devices sufficient?