Because of the Thanksgiving holiday in the U.S., TI E2E™ design support forum responses may be delayed from November 25 through December 2. Thank you for your patience.

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

[FAQ] MCU-PLUS-SDK-AM243X: How do I get CPSW diagnostic statistics using debug gels in MCU+ SDK Enet LLD?

Part Number: MCU-PLUS-SDK-AM243X

The CPSW IP in MCU+ devices supports debug/diagnostics stats. How do I print those stats using gel files provided in the MCU+ SDK Enet LLD?

  • CPSW statistics can be printed using below steps -

    1) Launch CCS and connect to Main R5F0_0 core

    2) Click on Tools --> Gel Files option from the top level menu

    3) In the newly opened GEL Files window, right click and choose “Load GEL”

    4) Choose file mcu_plus_sdk_xx_xx_xx\source\networking\enet\core\tools\debug_gels\cpsw_startup.gel.

    Note - Please make sure to remove all existing gels before loading the startup gel.

    5) Click on Scripts --> CPSW Statistics Print --> cpsw_xg_ststsprint_nonzero and you will see the stats registers on the console of CCS. 

    Please make sure to half the CPU to run the gel file.

    Below is device - gel mapping -

    * cpsw2g - am273x

    * cpsw3g - am263x/am24x

     

    Sample output for examples\networking\lwip\enet_lwip_cpsw (with Port 1 used):

    MAIN_Cortex_R5_0_0: GEL Output: STATS
    MAIN_Cortex_R5_0_0: GEL Output: --------------------------------
    MAIN_Cortex_R5_0_0: GEL Output: PORT0 STATS
    MAIN_Cortex_R5_0_0: GEL Output: --------------------------------
    MAIN_Cortex_R5_0_0: GEL Output: STAT_0_RXGOODFRAMES = 0x00000010
    MAIN_Cortex_R5_0_0: GEL Output: STAT_0_RXBROADCASTFRAMES = 0x0000000A
    MAIN_Cortex_R5_0_0: GEL Output: STAT_0_RXOCTETS = 0x000007AC
    MAIN_Cortex_R5_0_0: GEL Output: STAT_0_TXGOODFRAMES = 0x000000E3
    MAIN_Cortex_R5_0_0: GEL Output: STAT_0_TXBROADCASTFRAMES = 0x00000004
    MAIN_Cortex_R5_0_0: GEL Output: STAT_0_TXMULTICASTFRAMES = 0x000000D7
    MAIN_Cortex_R5_0_0: GEL Output: STAT_0_TXOCTETS = 0x0000779E
    MAIN_Cortex_R5_0_0: GEL Output: STAT_0_OCTETFRAMES64 = 0x00000021
    MAIN_Cortex_R5_0_0: GEL Output: STAT_0_OCTETFRAMES65T127 = 0x00000095
    MAIN_Cortex_R5_0_0: GEL Output: STAT_0_OCTETFRAMES128T255 = 0x00000025
    MAIN_Cortex_R5_0_0: GEL Output: STAT_0_OCTETFRAMES256T511 = 0x00000018
    MAIN_Cortex_R5_0_0: GEL Output: STAT_0_NETOCTETS = 0x00007F4A
    MAIN_Cortex_R5_0_0: GEL Output: STAT_0_TX_PRI_REG [0]= 0x000000E3
    MAIN_Cortex_R5_0_0: GEL Output: STAT_0_TX_PRI_BCNT_REG [0]= 0x0000779E
    MAIN_Cortex_R5_0_0: GEL Output: --------------------------------
    MAIN_Cortex_R5_0_0: GEL Output: PORT1 STATS
    MAIN_Cortex_R5_0_0: GEL Output: --------------------------------
    MAIN_Cortex_R5_0_0: GEL Output: STAT_1_RXGOODFRAMES = 0x000000E3
    MAIN_Cortex_R5_0_0: GEL Output: STAT_1_RXBROADCASTFRAMES = 0x00000004
    MAIN_Cortex_R5_0_0: GEL Output: STAT_1_RXMULTICASTFRAMES = 0x000000D7
    MAIN_Cortex_R5_0_0: GEL Output: STAT_1_RXOCTETS = 0x0000779E
    MAIN_Cortex_R5_0_0: GEL Output: STAT_1_TXGOODFRAMES = 0x00000010
    MAIN_Cortex_R5_0_0: GEL Output: STAT_1_TXBROADCASTFRAMES = 0x0000000A
    MAIN_Cortex_R5_0_0: GEL Output: STAT_1_TXOCTETS = 0x000007AC
    MAIN_Cortex_R5_0_0: GEL Output: STAT_1_OCTETFRAMES64 = 0x00000021
    MAIN_Cortex_R5_0_0: GEL Output: STAT_1_OCTETFRAMES65T127 = 0x00000095
    MAIN_Cortex_R5_0_0: GEL Output: STAT_1_OCTETFRAMES128T255 = 0x00000025
    MAIN_Cortex_R5_0_0: GEL Output: STAT_1_OCTETFRAMES256T511 = 0x00000018
    MAIN_Cortex_R5_0_0: GEL Output: STAT_1_NETOCTETS = 0x00007F4A
    MAIN_Cortex_R5_0_0: GEL Output: STAT_1_ALE_UNKN_MLT = 0x00000008
    MAIN_Cortex_R5_0_0: GEL Output: STAT_1_ALE_UNKN_MLT_BCNT = 0x000005A1
    MAIN_Cortex_R5_0_0: GEL Output: STAT_1_ALE_UNKN_BRD = 0x00000001
    MAIN_Cortex_R5_0_0: GEL Output: STAT_1_ALE_UNKN_BRD_BCNT = 0x00000040
    MAIN_Cortex_R5_0_0: GEL Output: STAT_1_TX_PRI_REG [0]= 0x00000010
    MAIN_Cortex_R5_0_0: GEL Output: STAT_1_TX_PRI_BCNT_REG [0]= 0x000007AC
    MAIN_Cortex_R5_0_0: GEL Output: --------------------------------
    MAIN_Cortex_R5_0_0: GEL Output: PORT2 STATS
    MAIN_Cortex_R5_0_0: GEL Output: --------------------------------

    Regards,

    Prasad