• State
  • Locked Locked
  • Replies 6 replies
  • Subscribers 31 subscribers
  • Views 674 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TMS570LC4357: SCI DMA Rx issue when same SCI module is enabled for tx over DMA

Shivam Kakad
Prodigy 115 points
Part Number: TMS570LC4357


Hi Team,

For our application on the TMS570LC4357 controller, We are using SCI3 with a baud rate of 57600, for data transmission as well as reception both over DMA. We have integrated the CRC check for the received packets to ensure the corruption/missing of the packet.

When we are executing the application, we are seeing the CRC for the received data is getting corrupted when the transmission is enabled; However, when we tried to disable the transmission and just enable the "receive" in that case it is receiving the data properly without any CRC corruption; meaning that data reception is getting corrupted only when the transmission is enabled. Also, this packet corruption is not a static place; it occurs sporadically, during the reception.

Can anyone please help in identifying the root cause and solution to resolve this issue?

Additionally, in both tx and rx enabled cases, we have observed that the "Overrun Error" flag is getting set.

Regards,

Shivam

  • 0
    TI__Guru**** 199096 points

    Hi Shivam,

    If the DMA channels is configured to follow a fixed priority scheme, the lower the channel number, the higher its priority. A channel will be arbitrated out whenever ther eis higher pending channel. 

    If the DMA channel for SCI TX has higher priority (lower channel number), and RX (DMA) may not be get serviced on time, so you get overrun error, and corrupted CRC.

  • 0 in reply to QJ Wang
    Prodigy 115 points

    Thanks, Wang for your Quick response. Currently, in the application, we have configured the Rx channel number as 4 and tx channel number as 5, still we are having this issue.

  • 0 in reply to Shivam Kakad
    TI__Guru**** 199096 points

    Hi Shivam,

    Is it possible for you to share your config code with me?

  • 0 in reply to QJ Wang
    TI__Guru**** 199096 points

    The SCI receiver and transmitter each have their own separate enable and interrupt bits. Both can be operated independently for half-duplex communication, or simultaneously for full-duplex communication. The transmit should not impact the receiving.

    Is the CRC calculated after all the data is received? If the CRC calculation is disabled, so you get over-run issue or parity issue? The overrun occurs only when a character is received before the previous character is fully read by the CPU or DMA. The previous character is overwritten and lost. The CRC of all the received data is corrupted.

    When both RX and TX interrupt requests are enabled, the receiver always should use higher priority than the transmitter to reduce the possibility of receiver overrun.

  • 0 in reply to QJ Wang
    Prodigy 115 points

    Hi Wang,


    Thanks for the response. Agree, that transmit should not impact the receiving, So could it happen due to the DMA congestion? Actually, in our Complete application developed on the TMS570LC43xx, we currently have SPI, as well as SCI, configured as DMA. So currently SPI1 for reception, SCI3 for both transmission and reception as well as SCI4 for tx and Rx, are operated on the DMA Engine. So overall there are in total 5 DMA channels in the system which we have configured. Out of them as the SPI1 is receiving the critical data, a high priority has been assigned to that channel. However, the other DMA channels are configured as default i.e. Low priority. And For both High and low priority queues, the Fixed priority scheme we have used.

    As currently, we are losing some of the bytes in SCI3 while receiving, we would like to understand what will be the best way/configuration that we can do, to handle all these DMA channels without losing their contents.


    Secondly, For your question, every time we are observing the over-run issue, not the parity, which as you suggest could be cause for the corruption of the received data and ultimately CRC.

  • 0 in reply to Shivam Kakad
    Prodigy 115 points

    Still, we are seeing this issue. Any Suggestions Team?