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TMS570LC4357-EP: Regarding verification of ESM1.53

Sho Kobori
Intellectual 640 points

Part Number: TMS570LC4357-EP

Hi,

This is question about notification of ESM 1.53.
We are now testing the ESM function of TMS570 MCU on the evaluation board.
Based on Sec 3.3.1 of SPNU563A, we have created the following test code.


test code:
volatile uint64 *ramtest = 0x08000000;
volatile uint64 tmp;
*ramtest = 0x8000000000000001;
/* SCMCNTRL(FFFF0A04h) - PAR DIAG EN(27-24) */
scmREG1->SCMCNTRL = (scmREG1->SCMCNTRL & 0xF0FFFFFF) | (0xAU << 24);
tmp = *ramtest;

We have expected to store ESM 1.53 when this test code execute, because Sec3.3.1 is explained "How to Check the Parity Compare Logic", but ESM 1.52 is stored.

Could you please advice me about techniques of generating ESM1.53?

Thanks,

Sho

  • +1
    TI__Guru**** 191886 points

    Hi,

      I don't think ESM 1.53 can be generated via diagnostic test. This is a parity error when the interconnect fails the parity checking for signals coming from other masters like CPU. See below diagram for clarification about global parity error. The AXI initiator in the diagram can be a CPU or DMA. CPU drives the control bus with parity bit in it. The interconnect will verify the parity. If a parity fails, a global parity error is generated. What this means is that this global parity error is only generated in runtime application, not during diagnostic. I also don't think you can force a parity bit flip in the CPU's AXI bus to cause interconnect to fail. 

  • 0 in reply to Charles Tsai
    Intellectual 640 points

    Hello Charles-san,

    Thank you for your support.

    Best regards,

    Sho