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TMS570LS1224: TI Safety Manual, Periodic Software Read Back of Static Configuration Registers: what about Level 2 and Level 3 (L2 and L3) Interconnect Subsystem

Marcus Coxon
Prodigy 250 points
Part Number: TMS570LS1224

REF: SPNU550B–October 2012–Revised December 2015 Safety Manual for TMS570LS12x ....

In order to achieve the req'ed ASIL rating for our system, we are being guided by the content of the TI Safety Manual and of particular interest at the moment is the following section:

In order to gain further insight as to what this means in practice, I changed my search of this doc from "software read back" to "software readback" and found a number of refs in section 6 that give an indication of what functional areas should be tested but one of these, quoted below, has caused confusion:

What I have been unable to identify is just what configuration registers are be being referred to here; can you please clarify?

Marcus

  • 0
    TI__Guru**** 196816 points

    Hi Marcus,

    Registers are considered static if they are only changed by a CPU write, are not changed dynamically by the module operation. The non-static register is the register if it is changed by the device logic as a result of normal operation of the device. An easy register to identify as non-static would be an interrupt flag register.

  • 0 in reply to QJ Wang
    Prodigy 250 points

    Hi QJ, I'm afraid my question wasn't directed at resolving what does and does not constitute a static register, but rather, more fundamentally, just what functionality the Safety Manual is referring to in its heading for section 6.10 ("Level 2 and Level 3 (L2 and L3) Interconnect Subsystem").

    For other sub-sections of section 6, that refer to static config reg's, we have successfully identified the corresponding sections in the TRM  but for this specific (6.10) sub-section, we have not been able to find corresponding sections in either the TRM or the data sheet (SPNS190B).

    Marcus

  • +1 in reply to Marcus Coxon
    TI__Guru**** 196816 points

    Hi Marcus,

    On LS12x device, the SCR is L2 interconnect, and PCR is L3 interconnect. The only module in the L2 and L3 interconnect subsystem that has memory-mapped registers is the PCR.

  • 0 in reply to QJ Wang
    Prodigy 250 points

    Hi QJ, thanks for the clarification.

    Marcus