• State TI Thinks Resolved
  • Locked Locked
  • Replies 3 replies
  • Answers 2 answers
  • Subscribers 30 subscribers
  • Views 262 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TMS570LS3137: problems of ESM

zhang xiaohong
Intellectual 730 points
Part Number: TMS570LS3137
Other Parts Discussed in Thread: HALCOGEN

hi，at the HALCOGen,why the group2 and group3 is gray？how to set it ?

  • 0
    TI__Guru**** 196306 points

    Hi Xiaohong,

    The ESM manages the various error conditions which are assigned to 128 channels. The 128 channels are divided into three groups. The group 1 has 64 channels with maskable interrupt and configurable error pin behavior. But the group 2 and group 3 are not configurable, they have pre-defined error pin behavior. The group 2 has non-maskable interrupt.

    This means that only the channels in ESM group1 are configurable.

  • 0 in reply to QJ Wang
    Intellectual 730 points

    How to use the channel diagnosis of Group1 on ESM, I now enable the Flash Ecc Signal, and the interrupt handler is written by himself, or Halcogen will generate, or if there is a case can be referred to?

  • 0 in reply to zhang xiaohong
    TI__Guru**** 196306 points

    You can enable the ESM Group1 channel to generate ESM high or ESM low interrupt. The ESM ISRs are generated by HALCoGen, but you need to write your own interrupt notification to handle the specific ESM error for example to clear the ESM Status flag and error flag in module status register.

    I don't example handling those kind of ESM errors. The attached is an example to generate ESM interrupt by injecting ECC error to MCU RAM:

    TMS570LS1224_ESM_nERROR_Test.zip