Other Parts Discussed in Thread: RM46L852,
My question is for any of the TMS or other TI's ARM based SoCs : which datasheet would contain the actual number of available / implemented hardware breakpoints & watchpoints (separate)?
So from ARM's doc:
says " ..The number of breakpoints and watchpoints is configured during implementation, see Configurable options. ", which the says anywhere in range 2 - 8 for break points.
I couldn't see anything in the TMS570x datasheet about what's configured specifically for these .. Where does TI document this?