This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

RM48L952: Safety TI package doubts

Part Number: RM48L952
Other Parts Discussed in Thread: HALCOGEN

Hi Ti,

Below are our doubts about the usage of the safety diag library.

1. For some safety features/diagnostic, SafeTI library provides the API name. But for some cases, CLK1(Low Power Oscillator Clock Detector ), CLK2 (External monitoring via ECLK ) and CLK5C (External watchdog) it Is mentioned as "handled by safety application". Does it mean, user application has to configure/enable those tests in SW, HW, and system?

2. In the above case, If the tests are SW dependent, is there any example code available?

3. For some diagnostics, CLK6  (Periodic software readback of static clock configuration registers) and CLK7  (Software readback of written configuration). What is the difference between both and how to implement it in the user application?

4. What does it mean "7.133 Use of DCC as Program Sequence Watchdog"? Does it is diagnostic for N2HET/DCC module or is this a diagnostics equivalent/same as an Internal or external watchdog (CLK5x) diagnostics?

Regards,

Monish

  • Hi Monish,

    1. CLK1: Low Power Oscillator Clock Detector (LPOCLKDET).The LPOCLKDET is enabled by default.

    CLK4: External Monitoring via ECLK. The device provides the capability to export selected internal clock (VCLK, PLL, etc) for external monitoring. This feature is not enabled by default, and must be enabled by SW.

    CLK5C: External watchdog. The use of an external watchdog over the internally provided watchdogs is suggested to ensure optimization of diversity of hardware and elimination of potential dependent faults. The MCU needs to feed the external watchdog through SPI or I2C or GIO. 

    2. ECK: You can use HALCoGen to generate code to enable ECK and select clock for ECK output. 

        External watchdog: The Diagnostic library has SPI code to feed the watchdog on TPS65381

    3. N2HET1[31] and N2HET2[20] are connected as a clock source for counter 1 in DCC (DCC1 and DCC2). This allows the application to measure the frequency of the pulse-width modulated (PWM) signal on those two N2HET pins.

  • Hi Wang,

    1&2. Is "handled by safety application" means the developer should take care of those diagnostic test?

    3. For some diagnostics, CLK6  (Periodic software readback of static clock configuration registers) and CLK7  (Software readback of written configuration). What is the difference between both and how to implement it in the user application?

    4. What does it mean "7.133 Use of DCC as Program Sequence Watchdog"? Does it is diagnostic for N2HET/DCC module or is this a diagnostics equivalent/same as an Internal or external watchdog (CLK5x) diagnostics?

     <Wang> N2HET1[31] and N2HET2[20] are connected as a clock source for counter 1 in DCC (DCC1 and DCC2). This allows the application to measure the frequency of the pulse-width modulated (PWM) signal on those two N2HET pins.

    <Moni> Whether 7.133 Use of DCC as Program Sequence Watchdog have any relation to CLK5x watchdog functionalities? If yes, then how?

    Regards,

    Monish P

  • Hi Monish,

    1&2, yes

    3. Software Readback of written configuration mechanism is a method to insure any written configuration to a register is correct/has not incurred a fault during the write transaction. Faults can occur due to transients impacting the bus transactions or stuck bits in the register to name a couple of potential faults.

    The Periodic Readback of Static configuration registers is the process in which you read back registers that do not change as a result of the specific module operation to insure that they haven't been inadvertently changed by either the software, by transient events, or by some permanent failure of the bits in the register. This insures continued operation in the manner in which you originally intended. An example of a static configuration register would be any of the registers used to define the clock for the device during startup. A non-static register would be a receive register for SPI, CAN, or other protocol.
    4. The N2HET has an internal RAM for storing and executing the N2HET instructions. The instructions are executed in a circular loop with deterministic duration. DCC Since each N2HET has a dedicated channel (N2HET1[31] and N2HET2[20]) internally connected to one of the two DCC modules, the N2HET clock output can be checked using DCC. You can consider this as a watchdog, but this is nothing to do with CLK5x (DWD and DWWD).