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TMS570LC4357-EP: Programming on single core

Domenico Margiotta
Prodigy 40 points
Part Number: TMS570LC4357-EP

Hello everyone,

for our project we use the TMS570LC4357-EP programming it in bare metal with only single task, so we don't use an O.S. or multitask programming. Our customer asks us which is the approch in order to use the dual core lockstep. Our first answer is that we aren't intended to use the lockstep ignornig the ESM signalation. After that they asked a second question, they undrestood we are using the uC with only one core and they would like a demonstration which process will be carried out to ensure that the second core will be not operative.

Reading the user manual, we didn't find any reference about the single or dual core programming.

I have some questions:

1) Is it possible to use only one core forcing the programmation?

2) if yes, how can i configure the uC?

3) Where can i find these information?

4) how can I  obtain information on CCS if my embedded application runs in single or dual core?

Thank you for your support.

Best regards.

Domenico

  • +1
    TI__Guru**** 190456 points

    Hi Domenico,

    Domenico Margiotta said:

    1) Is it possible to use only one core forcing the programmation?

    2) if yes, how can i configure the uC?

    3) Where can i find these information?

    4) how can I  obtain information on CCS if my embedded application runs in single or dual core?

    There are two Cortex-R5F cores on TMS570LC4357-EP processor and these two cores are permanently locked-step and this is by design. There is no way to have only one core operating while the other core is idle or have two cores running independently from each other. From a programmer's model perspective, it is one core but physically there are two cores in locked-step as a safety mechanism. These two cores always check each other and if there is any difference, a CCM error will be signaled  to the ESM module. 

      

  • 0 in reply to Charles Tsai
    Prodigy 40 points

    Hi Charles,

    thank you so much for your quick answer. From what I had read, I had guessed that there was no possibility of having one core active and the other in idle.

    Thank you so much again.

    Best regards.