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TMS570LC4357: how to enter privileged mode

Cherry Zhou
Mastermind 22235 points
Part Number: TMS570LC4357
Other Parts Discussed in Thread: HALCOGEN

Hi team,

Issue:

SCI sends data using DMA, which is configured to send data in 10 bytes at initial initialization. You want SCI to send 14 and 18 and 24 bytes of packets, respectively, while the program is running. Try modifying the transmit data length of the DMA control packet at this time; dmaRAMREG-> PCP[DMA_CH4].ITCOUNT = (14 << 16U) | 1; DmaSetChEnable(DMA_CH4, DMA_HW);  

Then finds that transmit DMA of the SCI is out of operation. The customer guess is because the ITCOUNT parameter of the register dmaRAMREG is in privileged mode to be written, so this parameter should be modified in privileged mode.

Could you help figure out what is the reason SCI's transmit DMA stops working after modifying the SCI's DMA control packet.

Could you help check this case? Thanks.

Best Regards,

Cherry

  • 0
    TI__Mastermind 22235 points

    Hi,

    May I know is there any updates?

    Thanks and Best Regards,

    Cherry

  • 0 in reply to Cherry Zhou
    TI__Guru**** 196666 points

    Hi Cherry,

    The Hardware channel enable bit is cleared at the end of block transfer. You need to reenable it to transfer next block.

    If the SCI SET_TX_DMA bit is cleared, please re-enable it to transmit data.

  • +1 in reply to QJ Wang
    TI__Guru**** 196666 points

    1. clear the SCI TX DMA bit 

    2. re-config the frame count and element count

    3. set hardware channel enable bit

    4. set the SCI TX DMA bit ti trigger transfer

    sciREG1->CLEARINT |= SCI_SET_TX_DMA;

    g_dmaCTRLPKT.FRCNT = size/2;         -->new FRCNT
    g_dmaCTRLPKT.ELCNT = 1;
    dmaRAMREG->PCP[0].ITCOUNT = (g_dmaCTRLPKT.FRCNT << 16U) | g_dmaCTRLPKT.ELCNT;

    /*Set dma channel 0 and 1 to trigger on hardware request*/
    dmaSetChEnable(DMA_CH0, DMA_HW);

    sciREG1->SETINT |= SCI_SET_TX_DMA; 

  • 0 in reply to QJ Wang
    TI__Guru**** 196666 points

    Hi,

    For ARM Cortex-R architecture, there are seven modes of operation: USR, FIQ, IRQ, SVC, ABT, UND, and SYS. Modes other than User Mode are collectively known as Privileged modes. For further information about privileged mode please refer to the Cortex-R4F TRM.

    The HalCoGen generates the device startup file where it will put the device into SYSTEM privileged mode. In the sys_core.asm you will find the _coreInitRegisters_() function where the core registers are initialized in different CPU operating modes. The _coreInitRegisters_() is called in the sys_startup.c in the very beginning. 

    If you run certain tasks in USER mode to restrict their access to critical memory areas, you cannot simply switch to System or Supervisor mode from User mode.

    From user mode, an exception is required to enter privilege modes. There are two ways software can initiate this: (a) using an SVC call, which will put you into the SWI handler and into supervisor mode, (b) using the System Software Interrupt of the system module (SSI) which will generate an IRQ interrupt for you and put you into the IRQ mode.