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TMS570LS3137-EP: CPU power down

Part Number: TMS570LS3137-EP
Other Parts Discussed in Thread: TMS570LS3137

We are using TMS570LS3137 in our project and we implemented external Hardware circuitry for watchdog functionality. In case of any failures SW will invoke failsafe function which is basically an infinite loop, eventually CPU will be reset by external watchdog circuit. However during non-correctable error such as "flash CRC failure or efuse failure" then watchdog reset happens repeatedly, hence we would like to keep the CPU at shutdown/dead  mode in order to avert multiple resets. Is there any way to do it so through software in TMS570ls3137 as we would like to avoid HW updates?

Thanks,

Subash

  • Hi Subash,

    However during non-correctable error such as "flash CRC failure or efuse failure" then watchdog reset happens repeatedly,

    How are you creating the flash CRC failure? Do you mean non-correctable Flash ECC failure or you really mean CRC failure?

    Why would your watchdog reset repeatedly? I'm not clear about your external WD circuit. Doesn't your WD circuit have a enable input that you can disable to avoid multiple resets?