Hi.
I'm currently programming HET to generate several pulses.
Because I need high frequency pulse(up to 2MHz), I have to reduce Loop time down 72.727 ns(prescale 8) to make clock close to 2MHz.
But that makes HR instruction slot too small, making it impossible to fit all instructions in loop time.
So I put quick clocks front and slow clocks behind, allowing it to have more than 8 instructions in longest path.
Is it ok to do this, in terms of cpu function/malfunctioning?
If RM48L952 guarantees that het will just return to instruction 0 when loop clock ends without any processor malfunctioning, it's ok for me; lower frequency clocks can wait.