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NHET I/O as GPIO Output

Jim Williams
Prodigy 20 points

Hello,

We have one question ...

In our operation we have:

 

 The NHET is running to trigger ADC operations and in preparation for operating an Inverter PWM (ex. Signals NHET[0-5]:  GA_LOWER, GA_UPPER, GB_LOWER,  GB_UPPER, GC_LOWER, GC_UPPER.).  So the NHET program is running (HETGCR, Bit “TO” is 1).

Then before running the PWM we need to use the Gate Signals as GPIO to set them as follows for approximately 3 ms:

  OFF:   GA_UPPER,  GB_UPPER, GC_UPPER

  ON:   GA_LOWER,  GB_LOWER, GC_LOWER

 

We understand how to disable specific NHET outputs (to high impedance) as described in question & answer “NHET pin disable output”, like:

HETPINDIS = HETPINDIS or 0x3F

HETDIR = HETDIR or 0x3F

 

But our operations to Set or Clear specific outputs using HETDCLR and HETDSET seem to be overwritten by the NHET timer data.

 

Can you provide the specific register operations (or suggested NHET program change) to set some NHET outputs On and some Off?

 

We hope that the whole NHET operation does not need to be turned off (HETGCR, Bit “TO” set 0), but we may be able to work with that, if it is the required way.

 

Many Thanks,

Jim W.

  • 0
    TI__Expert 7275 points

    Hi Jim,

    Here is one possible solution to your question:

    For the PWM control you specified, there are likely ECMP (or equiv) instructions being used to generate the individual PWM outputs.  In the Control Word of these instructions, there is a field labeled "Enable Pin Action", which is typical set to 1 (ON) during normal operation (i.e. to have the HET instruction physically control the pin).  From the CPU code, you can write to the control word of any HET instruction.  In particular, you can write to these specific control words with all other bits intact, except clearing the Enable Pin Action bit (=OFF).  This will stop the HET instruction from controlling that particular pin...

    So, it is possible to have the HET program still running (so that all other timing functions, such as ADC triggerring, remain intact) and switch to "GIO" control of the HET pins.  Simply disable these particular pins from being controlled by HET execution (and ultimately being controlled as GIO using the HETDSET and HETDCLR registers).

    Here is a rough example flow

    #####################################################################################

    HETGCR |=1;        // Turn on HET

    // ..... 

    // Stop HET control of Inverter

    HET_PWM_UPDATE_GA_LOWER_0.memory.control_word &= 0xfeffffff; // Stop pin action on GA_lower

    ....

    HET_PWM_UPDATE_GC_UPPER_0.memory.control_word &= 0xfeffffff; // Stop pin action on GC_upper

    // Control GA/GB/GC Pins as GIO

    HETDSET = 0x????????;

    HETDCLR = 0x????????;

    // Start HET control of Inverter

    HET_PWM_UPDATE_GA_LOWER_0.memory.control_word |= 0x01000000; // Start pin action on GA_lower

    ...

    HET_PWM_UPDATE_GC_UPPER_0.memory.control_word |= 0x01000000; // Start pin action on GC_UPPER

    #####################################################################################

    Here are a couple of key notes

    1.  I would not do the read modify write into HET memory (i.e. control_word &= 0xfeffffff) as shown in the example since this will take more CPU cycles.  Rather, define the control words of these values beforehand and simply write in constants for the two versions of the control word (with pin enable on and with pin enable off).

    2. You may need some synchronization to cleanly transition between the two modes.  For example, you may need to have the PWM update code apply updates so that all duty cycles are 0% and then update the control words (with the HETDOUT and other registers in a particular state as well).  You could to the same type of sync on the way back to having the inverter running

    Hope this helps.

    Regards,
    Eric

     

     

  • 0 in reply to Eric Best
    TI__Guru 68930 points

    Hi Eric,

    Good answer.  I would just add that yes, the HETDOUT register is shared between CPU and NHET.

    Both the CPU and NHET modify the same HETDOUT register - CPU through memory mapped writes to HETDOUT, HETDSET, HETDCLR where NHET uses pin actions from instructions like ECMP.

    So in the original post - I would say there is no equivalent to the function you have in HETDIR (where you can FORCE a pin to 3-state) for data out.  

    Instead the NHET program and the CPU program need to cooperate;  so a mechanism like you proposed would be a good choice.

    -Anthony  

  • 0 in reply to Eric Best
    Prodigy 20 points

    Hi Eric & Anthony,

       Thanks for the good and useful information.  This gives us good direction on the possible approaches.  The jury is still out on this specific approach due to the complexity of our PWM operations and the NHET program.

    Some feedback:

      - Reviewing this information with reference to the “TMS570LS Series Microcontroller, Technical Reference Manual (spnu489b.pdf) it would appear that the setting of the Control Word for the ECMP instruction would not be  0xfeffffff; and 0x01000000 but would be: 0xFFBFFFFF and 0x00400000.   Do I have the correct reference? Should the values be adjusted as stated?

      - I believe that this statement is not provided in the TRM and it would be good if it did:

         "At any time both the CPU or a running NHET program modify the same HETDOUT register:

           -  The CPU through memory mapped writes to HETDOUT, HETDSET, HETDCLR 

          - Then the NHET uses pin actions from instructions like ECMP."

     The multiple sources to the HETDOUT register do appear in some diagrams however there is no clear indication that there is no way to disable one or the other by some register operations.

    Again Thanks,

    Jim

  • 0 in reply to Jim Williams
    TI__Expert 7275 points

    Jim,

    You are most likely correct with the bit field math.  My intention was just to show the concept of modifying the Pin Action bit (with the real intent of just doing writes with the correct values, not RMW's).  So this was meant as an example psuedo code and not necessarily bit accurate.  Sorry if this was misleading (should have pulled up the TRM and verified the actual bit number).

    I agree that with your suggestion to clarify the manual on how both CPU and HET can access the pin.  We will take this feedback.

    Regards,
    Eric.  .