TMS570LS1224: OSCRST bit in SYSESR is set, but the reset signal can not be obversed on the PIN nRST

Qixin LIAO

Why the OSCRST bit in SYSESR is set, but the reset signal can not be obversed on the PIN nRST, and EXTRST bit is not set.

The OSCFAIL bit is set.

over 4 years ago

0 QJ Wang over 4 years ago

TI__Guru**** 200596 points

hi,

If PLLCTL1.23 (ROF) is set, the device responds to an oscillator failure by generating a device reset.

You can connect OSCIN to GND to generate OSC failure and device reset.

0 Qixin LIAO over 4 years ago in reply to QJ Wang

Prodigy 60 points

I tested the MCU. The OSCRST bit is set, but the EXTRST is not set.

If OSCRST bit is set , the pin nRST should be pulled low, and the EXTRST should be set too.

0 QJ Wang over 4 years ago in reply to Qixin LIAO

TI__Guru**** 200596 points

Yes, the EXTRST bit is set for reset caused by OSC fail, watchdog reset, SW reset, and external reset (nRST). The CPU reset, debug reset will not set EXTRST bit.

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TMS570LS1224: OSCRST bit in SYSESR is set, but the reset signal can not be obversed on the PIN nRST