TMS570LS0914: mibspi slave interrupt with variable length frames

Yves Belanger1

Part Number: TMS570LS0914

I'm trying to make mibspi3 as a slave (4-pin without ENA) work with variable length frames from the master.

Transfer group 0 (TG0) is configured for 30 words

With the master sending a frame of 20 words, I can see the first 20 Rx buffers filled correctly but I don't get any interrupts.

I'm looking for a way to get a notification when the master deasserts CS0 !!!

Thank you,

Yves Bélanger

over 3 years ago

0 QJ Wang over 3 years ago

TI__Guru**** 198766 points

Hi Yves,

The transfer finished interrupt is generated when a TG has finished. In your configuration, when 30 buffers have been filled, the interrupt is generated.

The de-assertion of CS0 doesn't generate interrupt. When MibSPI operates in slave mode, the CS pin is used to generate a trigger to corresponding TG. For example, CS0=LOW will trigger TG0.

0 Yves Belanger1 over 3 years ago in reply to QJ Wang

Prodigy 110 points

Hi QJ,

I know about the 'transfer completed' interrupt.

What I'm interested in is the 'transfer suspended' interrupt. I tried all buffer modes (1-6) without being able to generate any interrupt.

Is there a way to get a notification when the master deasserts CS0 before the TG has finished ?

Regards,

Yves Bélanger

0 QJ Wang over 3 years ago in reply to Yves Belanger1

TI__Guru**** 198766 points

Hi Yves,

The TG suspend interrupt is not supported in MibSPI slave mode.

0 Yves Belanger1 over 3 years ago in reply to QJ Wang

Prodigy 110 points

Hi QJ,

Fortunatly for me, on the LS0714 device, mibspi3_CS0 is 'muxed' with GIOB_2. This way, i can use the rising edge interrupt of GIOB_2 as an end-of-frame indicator !!!

Thank you for your support,

Yves Bélanger

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TMS570LS0914: mibspi slave interrupt with variable length frames