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AM2432: AFDX Implementation

Part Number: AM2432
Other Parts Discussed in Thread: SYSBIOS

Hi,

Is it possible to program an AFDX end point in AM2432 micro controller. What prerequisites may need  for the implementation.

Regards

Athuljith R

  • Hi Athujith,

    The AM2432 MCU+ SDK currently only supports the following Industrial communication protocols:

    EtherCat, EthernetIP, Profinet and IO-Link.

    AFDX is not supported at this point. 

    AM243x does have the Giga bit Ethernet support through CPSW or the PRUSS-ISCCG and up to 4 800Mhz R5F cores, so it is capable implement the new communication protocol like AFDX.

    Best regards,

    Ming

  • Hi Ming,

    Thanks for the reply. So with a custom software is it possible to implement the AFDX?

    Regards

    Athuljith R

  • Hi Athuljith,

    Given the hardware configuration of AM243x, I think it is very likely the AFDX can be implemented with custom software on AM2543x.

    Best regards,

    Ming

  • Hi Ming,

     

    Thank You for your confirmation and it would be great if you clarify our following doubts,

    • Is source code of TI RTOS/Baremetal Ethernet network stack code is available? So that we can try implementing required changes in the low level driver code for AFDX implementation
    • Is AFDX End System is been implemented in any of the TI Processor (with TI SysBIOS RTOS)? So that we can refer for our implementation.

  • Hi Senthilkumar,

    1. The source code for FreeRTOS/Baremetal Ethernet driver is available in MCU+SDK for AM243x.

    2. I am not aware of AFDX implementation on any TI devices.

    Best regards,

    Ming

  • Hi Ming,

    Thank You for your response, we have few more following doubts before finalizing the Software based AFDX end point design using AM243X,

    1. Is it possible to access and perform the raw data ethernet packet (Level#2 Ethernet packet)  by  using the TI RTOS Ethernet stack source code i.e. adding the user defined Ethernet headers details (like MAC source/destination address) which is must required for implementing AFDX protocol
    2. Need Few details on Timers available -> Which might be required for us to implement the AFDX End system Scheduler.
      1. Is it possible to have 0.5msecs timers in AM243X -> what will be accuracy and latency of timers
      2. Whether timers can trigger Interrupts to any user configurable processor core?
  • Hi Senthilkumar,

    Regarding 1, the answer is yes enet-lld has the support for raw layer 2 packets. we have enet_layer2_cpsw example for it.

    Regarding 2, the answer is yes too. There many timers can be used to generate 0.5ms for any of the 5 cores (5 R5F, 1 M4F)

    Best regards,

    Ming