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AM2431: Access from M4F in MCU domain to peripherals in MAIN domain

Hideaki Matsumoto
Expert 8540 points
Part Number: AM2431

Hi,

My customer is now considering AM243x and some questions about M4F. Could you answer some their questions below ?

 

Can M4F on AM2431 execute the code on DDR4 ?

 

MCU domain is isolated from SoC on the Safety option F device, correct ?

On the safety-capable device (F option), M4F cannot access the peripherals in MAIN domain ?

MCU_CBASS0 interconnect in MCU domain is not connected to CBASS0 in MAIN domain ?

 

Can M4F on AM2431 which doesn’t have F option access peripherals in MAIN domain such like DDR, PCIe, GPIO, etc… ? Can it access directly to the memory mapped registers of peripherals in MAIN domain ?

 Are the both frequency of CBASS0 and MCU_CBASS0 250MHz ?  What are the bus width (bit) of CBASS0 and MCU_CBASS0 ?

 

 Regards,

Hideaki

  • 0
    TI__Mastermind 26493 points

    Matsumoto-san, we are working to have a response by EOD Monday US time.

  • 0
    TI__Mastermind 46845 points

    Hi Hideaki-san,

    I worked with an FAE on this topic recently. Here is what I know.

    1. The M4 core can access to DDR, but it is very slow (long delay and no cache on M4). The trick is you have to set the RAT properly

    2. In theory, the M4 core  (in MCU domain) can access to the peripherals in Main domain too, but again the performance is concern. And you will need to set the RAT properly.

    3. Are the both frequency of CBASS0 and MCU_CBASS0 250MHz ? 

    [Chunhua]:MCU_CBASs runs 200MHz, while CBASS0 is 250MHz

    4. What are the bus width (bit) of CBASS0 and MCU_CBASS0 ?

    [Chunhua]:MCU_CBASS is a single -issue 32b bus width. CBASS0 has multiple crossbars, the bus width is from 128b to 32b.The crossbar connecting DDR is 128b.  so the path from M4F to DDR is M4F to a single issue 32b SCR at 200MHz -> 250MHz multi-issue 64b SCR -> 250MHz multi-issue 128b SCR -> DDR.

    Best regards,

    Ming

  • 0 in reply to Ming Wei
    TI__Expert 8540 points

    Hi Ming,

    Thank you so much for your answers. That's really helpful. Could I have any documnet or slide which describes the above information including some block diagram of inerconnect in detail ?

    Thanks and regafds,
    Hideaki Matsumoto

  • 0 in reply to Ming Wei
    TI__Expert 8540 points

    Hi Ming,

    Thank you very much for your responses. The above your answers are applied to the both Safety device and Non-safety device ? The customer doesn't need a Safety.

    Thanks and regards,
    Hideaki

  • 0 in reply to Hideaki Matsumoto
    TI__Mastermind 46845 points

    Hi Hideaki-san,

    As you can see the info is from Chunhua Hu directly. There is no document or slide available right now.

    Best regards,

    Ming

  • 0 in reply to Hideaki Matsumoto
    TI__Mastermind 46845 points

    Hi Hideaki-san,

    The above info applies to all AM243x devices. Its is determined by the system architecture and it has nothing to do with the safety.

    Best regards,

    Ming