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ESM error after startup

Hello,

I am trying to run an application on the MCBTMS570 development board from Keil. With a debugger attached everything works fine, when I do not use a debugger there is a problem.

Almost immediately after startup I copy the data section from the internal FLASH to the RAM. Before this only the data and instruction caches are enabled, the PLL is configured and the flash timings are set correctly. The processor is running at 180 MhZ. I have *not* initialized any modules (VIM, CAN, ...) at this stage yet. The ECC error detection has *not* been enabled. When I do this an error occurs, signalled by the Error PIN of the processor (it turns on a red LED on the development board). This only occurs when I attach the board to the power supply. If I reset the application by triggering a PORST with the PORST button on the board, the Error Pin does *not* signal an error. Also the application seems to be running fine afterwards. The application toggles an LED and sends CAN messages, e.t.c. The copy routine itself seems to be working, since I checked contents of a static variable which was initialized with an odd value and it was initialized correctly. (I sent a CAN message with the contents of the variable).

copy routine:

register char * p;
register char * q;

for ( p = &__STARTDATA, q = &__INITDATA; p < &__ENDDATA; p++, q++ )
{
 *p = *q;
}
for ( p = &__STARTBSS; p < &__ENDBSS; p++ )
{
 *p = 0;
}

Regards,

Tilmann Spiegelhauer

  • Hello Mr. Spiegelhauer,

    Please accept my apology for not seeing your post sooner.  You should now have an email notifying you that we have moved your post to the TMS570 Forum.  As a point of clarification above, when you reference data and instruction caches are you actually referring to the Tightly Coupled RAMs (TCM) of the TMS570LS20x device?

    Can you confirm that this remains an open issue?  If so, could you provide the serial number of the board in the event that we need to attempt to reproduce this situation?

  • Hi

    I have the same problem too, with the debugger everything works ok, but without it, the app generates in the startup an ESM error

    Did you find a solution to your problem ?

     

    Regards 

    Burim

  • When the ESM light is on, you should be able to still connect the debugger and see the registers, even if you didn't start the application with it.

    ESMSR1, 2, and 3 will tell you which error has been asserted (base address is 0xFFFFF518 if you can't see the register map but can see the memory).  Could you report the values of those?

  • Hi

    Sorry for the late answer

    1. ESMSR1 = 0x80000000

    2. ESMSR2 = 0x00000000

    3. ESMSR3 = 0x00000000

    Seems that an CCM - R4 error happens...  But i cannot understand because i run the STC test and not the CCM-selftest

    Regards 

    Burim

  • Hi

    Should the following registers be Zero after a Reset.....??

    Cpu2CurMisr2 = 0x00000005

    Cpu2CurMisr3 = 0xFFFFFFFF
    They hold this value everytime
    Regards
    Burim
  • A successful STC test won't trigger an ESM error.  One of the device experts will have to take this one over.

  • Burim,

    In your startup code, did you initilize cpu registers (R0 - R13) and the banked registers? These are needed so that core compare will not report an erroneous failure.

    Your reference to STC is for CPU or memory selftest? In addition to these tests, you can also run the selftest of core compare module. If this fails, you can generate esm error flags.

    If you notice that your error pin is on by default, you would notice ESM G2 or ESM G3 errors. ESM G1 errors do not toggle error pin unless the default configuration is changed.

    Whose IP values do cpu2curmisr2 and cpu2curmisr3 reflect?

    BChavali

  • Hi

    Yes i am initializing  the cpu registers.  

    I understand that for the cores exists two self tests

    1. STC  to test the 2 cpu cores

    2. CCM-R4 to  test the hardware compare module

    I am getting this behaviour if i try to run the STC test during run-time  and in normal mode( in debug mode it work without problems)

    The only think what could be is that i am running during run time the STC test in an Task (FreeRTOS)

    Regards Burim

  • Burim,

    Can you calrify the sequence at which the error signal is observed? After you power up the device and go through your initalization sequence, does the completion of CPU STC cause the error pin and esm status flags? Do you read any failure in STCFSTAT?

    Did you configure the STC clock divider?

    Info: Maximum STC clock rate support at 160MHz HCLK is 53.33 MHz. Divide HCLK by 3 to achive this clock rate. STCCLKDIV[26:24] register in the secondary system module frame at location 0xFFFF E108 is used.

    Thank you.

    B Chavali