This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

RM46L852: SPI SLAVE in DMA mode

Part Number: RM46L852


Hello everyone !

I was looking for SPI slave examples and Mr Wang pointed me out some of them in this thread :

https://e2e.ti.com/support/microcontrollers/arm-based-microcontrollers-group/arm-based-microcontrollers/f/arm-based-microcontrollers-forum/1077752/rm46l852-spi-slave-example-code/3989360#3989360

I'm really interested in SPI dma transfers.

But this example shows only (but it's a great thing thanks) how to write data to a SPI slave in DMA. But what about reading data from the SPI slave in DMA. And more precisely what about writing some commands bytes to the SPI slave and depending of it read a given amout of data from the SPI slave in the same SPI frame still in DMA ?

Best regards,

Fabian

  • Hi Fabian,

    To begin SPI communication, the master must send the clock signal and select the slave by enabling the CS signal (usually active low). SPI is a full-duplex interface; both master and slave can send data at the same time via the MOSI and MISO lines respectively. During SPI communication, the data is simultaneously transmitted (shifted out serially onto the MOSI/SDO bus) and received (the data on the bus (MISO/SDI) is sampled or read in). The serial clock edge synchronizes the shifting and sampling of the data.

    The SPI generates a request on the TX_DMA_REQ line each time the TX data is copied to the TX shift register either from the TXBUF or SPIDAT1.
    The SPI generates a request on the RX_DMA_REQ line each time the received data is copied to the SPIBUF.

    The SPI slave should be configured and ready to receive data before the master starts to transmit data.

    For SPI Slave TX DMA packet setting:

    g_dmaCTRLPKT_TX.SADD = &TX_DATA; /* source address */
    g_dmaCTRLPKT_TX.DADD = ((uint32_t)(&(spiREG1->DAT1)) + 2); /* SPI1 is configured as SLAVE, destination address */
    g_dmaCTRLPKT_TX.CHCTRL = 0; /* channel control */
    g_dmaCTRLPKT_TX.FRCNT = FrameCnt; /* frame count */
    g_dmaCTRLPKT_TX.ELCNT = ElmntCnt; /* element count */
    g_dmaCTRLPKT_TX.ELDOFFSET = 0; /* element destination offset */
    g_dmaCTRLPKT_TX.ELSOFFSET = 0; /* element destination offset */
    g_dmaCTRLPKT_TX.FRDOFFSET = 0; /* frame destination offset */
    g_dmaCTRLPKT_TX.FRSOFFSET = 0; /* frame destination offset */
    g_dmaCTRLPKT_TX.PORTASGN = 4; /* port b */
    g_dmaCTRLPKT_TX.RDSIZE = ACCESS_16_BIT; /* read size */
    g_dmaCTRLPKT_TX.WRSIZE = ACCESS_16_BIT; /* write size */
    g_dmaCTRLPKT_TX.TTYPE = FRAME_TRANSFER; /* transfer type */
    g_dmaCTRLPKT_TX.ADDMODERD = ADDR_INC1; /* address mode read */
    g_dmaCTRLPKT_TX.ADDMODEWR = ADDR_FIXED; /* address mode write */
    g_dmaCTRLPKT_TX.AUTOINIT = AUTOINIT_ON; /* autoinit */

    For SPI Slave RX DMA packet setting:

    g_dmaCTRLPKT_RX.SADD = ((uint32_t)(&(spiREG1->BUF)) + 2); /* SPI1 is configured as SLAVE source address */
    g_dmaCTRLPKT_RX.DADD = &RX_DATA; /* destination address */
    g_dmaCTRLPKT_RX.CHCTRL = 0; /* channel control */
    g_dmaCTRLPKT_RX.FRCNT = FrameCnt; /* frame count */
    g_dmaCTRLPKT_RX.ELCNT = ElmntCnt; /* element count */
    g_dmaCTRLPKT_RX.ELDOFFSET = 0; /* element destination offset */
    g_dmaCTRLPKT_RX.ELSOFFSET = 0; /* element destination offset */
    g_dmaCTRLPKT_RX.FRDOFFSET = 0; /* frame destination offset */
    g_dmaCTRLPKT_RX.FRSOFFSET = 0; /* frame destination offset */
    g_dmaCTRLPKT_RX.PORTASGN = 4; /* port b */
    g_dmaCTRLPKT_RX.RDSIZE = ACCESS_16_BIT; /* read size */
    g_dmaCTRLPKT_RX.WRSIZE = ACCESS_16_BIT; /* write size */
    g_dmaCTRLPKT_RX.TTYPE = FRAME_TRANSFER; /* transfer type */
    g_dmaCTRLPKT_RX.ADDMODERD = ADDR_FIXED; /* address mode read */
    g_dmaCTRLPKT_RX.ADDMODEWR = ADDR_INC1; /* address mode write */
    g_dmaCTRLPKT_RX.AUTOINIT = AUTOINIT_ON; /* autoinit */

  • Hello Mr Wang,

    Thanks for your support.

    Best Regards,

    Fabian