Can any of the '570 gurus out there weight in on what they believe would be the highest bandwidth/most pin efficient method of linking a TMS570 to an external FPGA.
I've considered the following (not entirely sure if my numbers are 100% right but please let me know if not):
1) EMIF - appears that I can only achieve 16-bit transfers one direction at a time at a maximum of 33.3MHz? By my calculations maximum bandwidth would be:
533.3 Mbits/second
2) MIBSPI5 - appears that you can do 4-bits full duplex at 20MHz? Is this clock rate right (SPICLK limited to 50ns cycle on MIBSPI5 also?)
160 Mbits/second
3) Combination of RTP and DMM. As I read it he RTP could write 16-bits synchronously at 100MHz while the DMM can take 16-bits at only 80MHz.
Packet mode in intriguing due to the lack of overhead to read and write specific regions a la DMA style. But in raw mode I have:
2880 Mbits/second
Any other suggestions?
