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RM57L843: SL_SelfTest_PBIST() does not finish after FEE data is written

Part Number: RM57L843
Other Parts Discussed in Thread: HALCOGEN

Hi,

My customer implemented FEE feature in their code. The FEE code is based on HalCoGen FEE sample code.
After the code runs once and some data are written in FEE, the device is power cycled.
Then the initialization code (HL_sys_startup.c) stops at below point.

    /* Start PBIST on STC and PBIST ROM */
    SL_SelfTest_PBIST( PBIST_EXECUTE,
                    PBIST_RAMGROUP_01_PBIST_ROM |
                    PBIST_RAMGROUP_02_STC1_1_ROM_R5 |
                    PBIST_RAMGROUP_03_STC1_2_ROM_R5 |
                    PBIST_RAMGROUP_04_STC2_ROM_NHET,
                    PBISTALGO_TRIPLE_READ_FAST_READ |
                    PBISTALGO_TRIPLE_READ_SLOW_READ);
        /* Wait for PBIST for PBIST and STC ROM to be completed */
    do {
      nop();
    }while(SL_SelfTest_WaitCompletion_PBIST() != TRUE);


The return value from SL_SelfTest_WaitCompletion_PBIST() never gets "TRUE" and the code does not exit the while loop.
Why writing some data using FEE prevent PBIST?

The codes used for FEE write operation are below:
(code inserted in HL_sys_main.c)
  uint8 SpecialRamBlock[100];

        /* Initialize FEE. This will create Virtual sectors, initialize global variables etc.*/
        TI_Fee_Init();
        do
        {
                TI_Fee_MainFunction();
                delay();
                Status=TI_Fee_GetStatus(0 );
        }
        while(Status!= IDLE);

        /* Write the block into EEP Asynchronously. Block size is configured in ti_fee_cfg.c file. Default Block size is
           8 bytes */
        BlockNumber=0x1;

        TI_Fee_WriteSync(BlockNumber, &SpecialRamBlock[0]); // }


below code is also added in ti_fee_cfg.c.
const Fee_BlockConfigType Fee_BlockConfiguration[TI_FEE_NUMBER_OF_BLOCKS] = {
        /*      Block 1 */
        {
               /* Block number                          */     1U,
               /* Block size                            */     512U,
               /* Block immediate data used             */     TRUE,
               /* Number of write cycles                */     0x8U,
               /* Device Index                          */     0x00000000U,
               /* Number of DataSets                    */     1U,
               /* EEP number                            */     0U
        }


Thanks and regards,
Koichiro Tashiro 

  • Hi Koichiro,

    I don't think that data programmed to FEE can affect the PBIST to STC/PBIST ROM. Does the PBIST test pass if FEE is not used in your code?

    Noticed that the FEE block1 size is 512 bytes, but the SpecialRamBlock[] size is 100 only. 

  • Hi Koichiro-san,

    Can you perform ROM PBIST one by one, and check which test causes the problem?

    uint64 allROMmemories[] = {PBIST_RAMGROUP_01_PBIST_ROM,

                                                  PBIST_RAMGROUP_02_STC1_1_ROM_R5,

                                                  PBIST_RAMGROUP_03_STC1_2_ROM_R5,

                                                  PBIST_RAMGROUP_04_STC2_ROM_NHET};


    uint32 allROMalgos[] = {PBISTALGO_TRIPLE_READ_SLOW_READ,

                                           PBISTALGO_TRIPLE_READ_FAST_READ};

    /*running pbist on all ROM memories*/
    for(i = 0;i < (sizeof(allROMmemories)/sizeof(uint64));i++)
    {

         for(j =0;j<(sizeof(allROMalgos)/sizeof(uint32));j++)
         {
                retVal = SL_SelfTest_PBIST( PBIST_EXECUTE,  allROMmemories[i],   allROMalgos[j]);

                while (TRUE != SL_SelfTest_Status_PBIST(&failInfoPBISTOthers));

         }

    }