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TMS570LC4357: Problem in reading few PHY registers data over MDIO

Shivam Kakad
Prodigy 115 points
Part Number: TMS570LC4357


Hi Team,

For our application on TMS570LC4357 controller, we are using the MDIO interface to communicate with the DP83848 PHY chip, where we are able to establish the communication successfully and getting the ping responses, the way we desired. However, as per our requirement we want to configure and read back the destination mac address for which we have to access the ReceivePerfectMatchDataRegister#3 (RXFPMD3) register whose address is 0x40A4. Here to communicate with the PHY we are sending the PHY register address to the MDIO interface. But, as per the reference manual of controller, the maximum bits we can use for the PHY register address is 5 (REGADR field of USERACCESS0 register), So we are finding challenges to communicate with the PHY for configuring/reading the RXFPMD3 register values.

In this scenario, we are looking for a way to configure such registers of PHY using MDIO? Isn't it possible for us to configure such registers using MDIO? Request team to help us in resolving this issue.

Regards,
Shivam

  • 0
    TI__Guru**** 199016 points

    Hi Shivam,

    I don't see the register at address 0x40A4 in DP83848 datasheet. The maximum address is 0x1F, but only 30 addresses are used per the datasheet.

  • 0 in reply to QJ Wang
    Prodigy 115 points

    Hi Wang, I have not to informed the PHY chip name correctly earlier, DP83848 PHY is available on Evaluation Board; However we are trying to communicate with the DP83822 PHY. Where i was referring to the below register from the datasheet.

  • 0 in reply to Shivam Kakad
    Prodigy 115 points

    Hi Team, Do you have any update for this?

  • 0 in reply to Shivam Kakad
    Intellectual 280 points

    Hi,

    Any update on this issue ? Request your response on the question,

  • 0 in reply to Srihari Manthri
    TI__Guru**** 199016 points

    Hi Shivam,

    The DP83822 SMI function supports read and write access to the extended register set using the Register Control Register (REGCR, address 0x000D), the Data Register (ADDAR, address 0x000E), and the MDIO Manageable Device (MMD) indirect method.

    ADDAR is the address/data MMD register. ADDAR is used in conjunction with REGCR to provide the access to the extended register set.

    For example, write data 0x28 to an extended register 0x04A4:

    1. Write the value 0x001F (address function field = 00, DEVAD = 31) to register REGCR.

    2. Write the register address 0x40A4 to register ADDAR.

    3. Write the value 0x401F (data, no post increment function field = 01, DEVAD = 31) to register REGCR.

    4. Write the content (0x28) of the desired extended register set to register ADDAR.

    Please refer to the datasheet of DP83822 PHY.

    BTW, the register address (0x40A4) mentioned in your post is not correct. This PHY doesn't have this register.