This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TMS570LS3137: PBIST is required even though we have Parity or ECC Enables for a memory

Part Number: TMS570LS3137

Hi 

Currently we are using PBIST self test as part of power on sequence to test different memories.

We have marked few memories as critical and stop the boot process if they have a failure and do not proceed,  But for few non critical memories we just complete the boot sequence and proceed to application code.

My question do we need to perform PBIST self test at all  ? because all of the RAM\ROM memories in microcontroller has parity and ECC enabled . which will catch if we have any failure in the RAM\ROM memories.

  • Hello Manzoor,

    I recommend to perform PBSIT test for all the memories used in your application during boot-time. Running PBIST on memories is destructive and you should backup yur data and runtime information when performing a PBIST periodically. 

    If your application has a very long ON time (Days, weeks, even years) without a power cycle, latent faults become an issue since. In this case, there may be a need to include the concept of a maintenance cycle where the unit is power cycled or soft reset at a regular, specified interval in time (once/wk, once/year... depends on the application needs). This interval could also, arguably, be considered a periodic test.

  • Thanks Wang for the quick response.

    But what I am trying to understand here,  is there any situation we have ? where we have an actual memory fault during its usage and not caught by ECC or parity. is it possible that ECC or parity don't catch the fault which would be caught if we run PBIST ?

  • Hi QJ Wang

    Can you help me understand above query ?

  • The ECC only checks the resources which are currently being used, so It doesn't check the unused the memory, but PBIST can check the whole RAM range. 

    For the same memory location, if PBIST test failed, the ECC should report error if you this memory location.