LP-AM243: GPIO interrupt config

Hi Huy,

Please see the AM64x/AM243x TRM, 9.3.1 INTRTR Overview:

"The interrupt router (INTRTR) module provides a mechanism to mux M interrupt inputs to N interrupt outputs,
where all M inputs are selectable to be driven per N ouput. There is one register per output (MUXCNTL_N) that
controls the selection."

For each output, any of the inputs can be routed to the output.

Huy Khuat said:

MAIN_GPIO_INTRTR_IN_180 →  MAIN_GPIOMUX_INTROUTER0_OUTP_[9]

In this case, INTRTR Input #180 (from Inputs 0...198) is routed to INTRTR Output #9 (from Outputs 0...53) (i.e. Output #9 selects Input #180):

• INTRTR Input #180: connected to GPIO1 GPIO_1_BANK0_INT, see Figure 12-57. GPIO Integration
• INTRTR Output #9: connected to R5FSS0_CORE0/1 R5FSS0_CORE0/1_INTR_IN_[32+9], see Figure 9-19. GPIOMUX_INTRTR0 Integration.

Regards,
Frank