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TMS570LC4357: SDRAM(IS42S16400J-7BLI) Load mode register configuration issue

Cherry Zhou
Mastermind 22235 points
Part Number: TMS570LC4357
Other Parts Discussed in Thread: HALCOGEN

Hi team,

Here's an issue from the customer may need your help:

To configure SDRAM, the device supports SDRAM Commands configuration as per the manual:

And the SDRAM initialization process:

The EMIF driver is generated by HALCogen and the Load mode register is not configured. The customer would like to know how to configure the Load mode of SDRAM.

Could you help check this case? Thanks.

Best Regards,

Cherry

  • 0
    TI__Guru**** 197126 points

    Hi Cherry,

    The SDRAM initialization sequence (step1 to step 6) is triggered by writing the least 3 bytes of SDCR register (page size, bank, ..). You don't need to issue LMR command, PRE command manually. 

    In HALCOGen EMIF initialization code (emif_SDRAM_StartupInit()):

    emifREG->SDCR = (uint32)((uint32)0U << 31U)|
                                    (uint32)((uint32)1U << 14U)|
                                    (uint32)((uint32)2U << 9U)|
                                    (uint32)((uint32)1U << 8U)|
                                    (uint32)((uint32)2U << 4U)|
                                    (uint32)((uint32)elements_256);

    will trigger the SDRAM initialization (step 1~step 6).