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Original question:

AM6442: MCSPI CHSTAT.TXS behavior is controlled by MODULCTRL.SINGLE

AM2434: MCSPI CHSTAT.TXS behavior is controlled by MODULCTRL.SINGLE

Kalman Budai
Intellectual 490 points
Part Number: AM2434

Dear TI,

finally I repeated my test with channel 0 and got the same result like before with channel 2:

Setting CHCTRL.EN bit produces rising of CHSTAT.TXS bit and the corresponding IRQSTATUS.TXn_EMPTY bit when MODULCTRL.SINGLE = 0.

TXS bit does not come when SINGLE = 1.

Why?

Regards, Kalman

  • 0
    TI__Guru 55045 points

    Hi Kalman,

    I will forward this one to our MCSPI expert for further comment.

    Best regards,

    Ming

  • 0
    TI__Genius 12380 points

    Hi Kalman,

    Can you please check below example which is Single Channel in interrupt mode? Also please provide more details on your usecase.

    examples\drivers\mcspi\mcspi_loopback\am243x-evm\r5fss0-0_nortos

    Regards,

    Sunil Kumar M S

  • 0 in reply to Sunil Kumar M S
    Intellectual 490 points

    Hi Sunil,

    sorry for my late response.

    We are using SPI memory device and two shift register chains connected to SPI port of Sitara and I went down to registers and bits to produce effective code. I have learned in last 40 years that it is advisory to check the availability of the output register before writing a new value. This is the TxEmpty bit in this case. I have made a low level SPI EEPROM driver in single mode and used the TxEmpty bit according to practice. Next task was to drive the shift registers, two channels in master mode ==> MODULCTRL.SINGLE = 0. I was happy to get hardware driven chip select signals. I reused my single master code & knowledge at first and was surprised that TxEmpty is not set after channel enable in multi channel mode. I am ready with my code, it is OK. I am just wondering at this funny behavior of TxEmpty.

    SPRUIM2C page 5502 suggest wait for TxEmpty after channel enable even in muli master mode:

    Regards, Kalman

  • 0 in reply to Kalman Budai
    TI__Genius 12380 points

    Hi Kalman,

    I will check this behavior and will let you know.

    Regards,

    Sunil Kumar M S

  • 0 in reply to Sunil Kumar M S
    TI__Guru 55045 points

    Hi Sunil,

    Any progress on this issue?

    Thanks!

    Ming

  • +1 in reply to Ming Wei
    TI__Expert 6065 points

    Hi Kalman,

    I checked the below driver example and updated the mode of operation to "multi master" in syscfg gui

    examples\drivers\mcspi\mcspi_loopback\am243x-evm\r5fss0-0_nortos

    In the function MCSPI_masterIsr, put a break point and taken the register dump and I am seeing the TX0 Empty in irq status is set and also the TXS in the CHSTAT is also set.

    Regards,

    Prasad