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TM4C129XNCZAD: External SDRAM integration with EPI.

Part Number: TM4C129XNCZAD

Hello Everyone,

I am trying to use external SDRAM (W9812G6KH-6) with TM4C129X microcontroller so that I can drive LCD  module with bigger frame buffer size.

I have written the following EPI code for External SDRAM. I am using PH0,PH1,PH2,PH3,PN2,PN3 pins.

#define EPI_PORTA_PINS (GPIO_PIN_7 | GPIO_PIN_6)
#define EPI_PORTB_PINS (GPIO_PIN_3)
#define EPI_PORTC_PINS (GPIO_PIN_7 | GPIO_PIN_6 | GPIO_PIN_5 | GPIO_PIN_4)
#define EPI_PORTG_PINS (GPIO_PIN_1 | GPIO_PIN_0)
#define EPI_PORTH_PINS (GPIO_PIN_3 | GPIO_PIN_2 | GPIO_PIN_1 |GPIO_PIN_0)
#define EPI_PORTK_PINS (GPIO_PIN_5 )
#define EPI_PORTL_PINS (GPIO_PIN_3 | GPIO_PIN_2 | GPIO_PIN_1 | GPIO_PIN_0)
#define EPI_PORTM_PINS (GPIO_PIN_3 | GPIO_PIN_2 | GPIO_PIN_1 | GPIO_PIN_0)
#define EPI_PORTN_PINS (GPIO_PIN_3 | GPIO_PIN_2)

static volatile uint16_t *g_pui16EPISdram,p11,p22,p33,p44;

void EPI_INIT(void)

{

SysCtlPeripheralEnable(SYSCTL_PERIPH_EPI0);

SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA);
SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOB);
SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOC);
SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOG);
SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOH);
SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOK);
SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOL);
SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOM);
SysCtlPeripheralEnable(SYSCTL_PERIPH_GPION);
SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOP);

GPIO_PORTA_AHB_PCTL_R |= 0xFF000000;

GPIO_PORTB_AHB_PCTL_R |= 0x0000F000;

GPIO_PORTC_AHB_PCTL_R |= 0xFFFF0000;

GPIO_PORTG_AHB_PCTL_R |= 0x000000FF;

GPIO_PORTH_AHB_PCTL_R |= 0x0000FFFF;

GPIO_PORTK_PCTL_R |= 0x00F00000;

GPIO_PORTL_PCTL_R |= 0x0000FFFF;

GPIO_PORTM_PCTL_R |= 0x0000FFFF;

GPIO_PORTN_PCTL_R |= 0x0000FF00;

GPIOPinTypeEPI(GPIO_PORTA_BASE, EPI_PORTA_PINS);
GPIOPinTypeEPI(GPIO_PORTB_BASE, EPI_PORTB_PINS);
GPIOPinTypeEPI(GPIO_PORTC_BASE, EPI_PORTC_PINS);
GPIOPinTypeEPI(GPIO_PORTG_BASE, EPI_PORTG_PINS);
GPIOPinTypeEPI(GPIO_PORTH_BASE, EPI_PORTH_PINS);
GPIOPinTypeEPI(GPIO_PORTK_BASE, EPI_PORTK_PINS);
GPIOPinTypeEPI(GPIO_PORTL_BASE, EPI_PORTL_PINS);
GPIOPinTypeEPI(GPIO_PORTM_BASE, EPI_PORTM_PINS);
GPIOPinTypeEPI(GPIO_PORTN_BASE, EPI_PORTN_PINS);

EPIDividerSet(EPI0_BASE, 1);
EPIModeSet(EPI0_BASE, EPI_MODE_SDRAM);
EPIConfigSDRAMSet(EPI0_BASE, (EPI_SDRAM_CORE_FREQ_50_100 | EPI_SDRAM_FULL_POWER |EPI_SDRAM_SIZE_128MBIT), 1024);
EPIAddressMapSet(EPI0_BASE, EPI_ADDR_RAM_SIZE_16MB | EPI_ADDR_RAM_BASE_6);
while(HWREG(EPI0_BASE + EPI_O_STAT) & EPI_STAT_INITSEQ)
{
}
g_pui16EPISdram = (uint16_t *)0x60000000;

g_pui16EPISdram[0] = 0x21;
g_pui16EPISdram[1] = 0x124;
g_pui16EPISdram[2] = 0x213;
g_pui16EPISdram[3] = 0x123;

p11 = g_pui16EPISdram[0];
p22 = g_pui16EPISdram[1];
p33 = g_pui16EPISdram[2];
p44 = g_pui16EPISdram[3];

}

int main(void)

{

MAP_SysCtlClockFreqSet((SYSCTL_XTAL_25MHZ |SYSCTL_OSC_MAIN |SYSCTL_USE_PLL |SYSCTL_CFG_VCO_240), 120000000);

EPI_INIT();

while(1){}

}

When I'm running the code, I am getting p11=0,p22=1,p33=2,p44=3.

I am to know what's wrong with my code?

  • Hi,

      Did you have chance to reference the sdram example at C:\ti\TivaWare_C_Series-2.2.0.295\examples\peripherals\epi\sdram.c? Can you also use the logic analyzer to look at the data signals and check if you are meeting all the timing requirements for W9812G6KH-6?