Hi experts,
I aked about the quadrant mapping here: https://e2e.ti.com/support/microcontrollers/arm-based-microcontrollers-group/arm-based-microcontrollers/f/arm-based-microcontrollers-forum/1097215/tms570lc4357-masterid-filtering-which-peripheral-is-in-which-quadrant
I understand the description of the register and how configure most of the registers, but the Privileged Peripheral Memory Frame MasterID Protection Registers (Technical Reference 2.5.3.39 and 2.5.3.40) is very diffent from the others and quite confusing.
I would have assumed that thes would work the same as all the others. registers ending with _L would be quadrant 0 and 1 und register ending with _H would be quadrant 2 and 3.
But if we look for example at DMA RAM with PPCS[0] which is a 4Kb frame and the take a look at register PPCS0MSTID the description mentions 1 register for this.
The decription of this register says MasterId filtering for PPCS[2n] and PPCS[2n+1]
(Q1) Can you please explain how to use registers PCS[0-31]MSTID and PPCS[0-7]MSTID ?
Thank you and best regards,
Max
