TMS570LC4357: Is MPU same as NMPU?

/** @file HL_sys_main.c 
*   @brief Application main file
*   @date 11-Dec-2018
*   @version 04.07.01
*
*   This file contains an empty main function,
*   which can be used for the application.
*/

/* 
* Copyright (C) 2009-2018 Texas Instruments Incorporated - www.ti.com  
* 
* 
*  Redistribution and use in source and binary forms, with or without 
*  modification, are permitted provided that the following conditions 
*  are met:
*
*    Redistributions of source code must retain the above copyright 
*    notice, this list of conditions and the following disclaimer.
*
*    Redistributions in binary form must reproduce the above copyright
*    notice, this list of conditions and the following disclaimer in the 
*    documentation and/or other materials provided with the   
*    distribution.
*
*    Neither the name of Texas Instruments Incorporated nor the names of
*    its contributors may be used to endorse or promote products derived
*    from this software without specific prior written permission.
*
*  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
*  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
*  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
*  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
*  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
*  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 
*  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
*  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
*  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
*  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 
*  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/


/* USER CODE BEGIN (0) */
/* USER CODE END */

/* Include Files */

#include "HL_sys_common.h"

/* USER CODE BEGIN (1) */
//#include "HL_emif.h"
#include "HL_sys_dma.h"
#include "HL_sys_core.h"
#include "HL_gio.h"
#include "HL_pinmux.h"
#include "HL_esm.h"


/* example data Pattern configuration */
#define E_COUNT      8   /*64, Element count*/
#define F_COUNT      32    /*16, Frame count*/
#define D_SIZE      E_COUNT * F_COUNT

void loadDataPattern(uint32 psize, uint32* pptr, uint32 pattern);


#pragma SET_DATA_SECTION(".sharedRAM")
uint32 TXDATA_RAM0[D_SIZE];         /* transmit buffer in sys ram */
uint32 RXDATA_RAM0[D_SIZE]= {0};    /* receive  buffer in sys ram */

uint32 TXDATA_RAM1[D_SIZE];         /* transmit buffer in sys ram */
uint32 RXDATA_RAM1[D_SIZE]= {0};    /* receive  buffer in sys ram */

g_dmaCTRL g_dmaCTRLPKT1, g_dmaCTRLPKT2;  /* dma control packet configuration stack */

#pragma SET_DATA_SECTION()

/* USER CODE END */

/** @fn void main(void)
*   @brief Application main function
*   @note This function is empty by default.
*
*   This function is called after startup.
*   The user can use this function to implement the application.
*/

/* USER CODE BEGIN (2) */
unsigned int Channel0_HBC_Flag;
unsigned int Channel1_HBC_Flag;

/* USER CODE END */

int main(void)
{
/* USER CODE BEGIN (3) */
    /* enable IRQ interrupt */
    /*clear ESM error*/
    uint16 i, j=0;

    gioInit();

    _enable_IRQ();

    Channel0_HBC_Flag = 0;
    Channel0_HBC_Flag = 1;

    //dmaREG->PTCRL = 0x03 | 0x1 << 3 | 0x1 << 18;  /* prority scheme: rotation*/

    /* - creating a data chunk in system ram to start with ... */
    loadDataPattern(D_SIZE, &TXDATA_RAM0[0], 0x5A5A5A5A);
    loadDataPattern(D_SIZE, &TXDATA_RAM1[0], 0x5B5B5B5B);

   /* - configuring dma control packets   */
   g_dmaCTRLPKT1.SADD      = (uint32)TXDATA_RAM0;    /* source address             */
   //g_dmaCTRLPKT1.DADD      = (uint32)(0x80000000);  //(0x08078000);    /* destination address; SDRAM       */
   g_dmaCTRLPKT1.DADD      = (uint32)RXDATA_RAM0;  //(0x08078000);    /* destination address; SDRAM       */
   g_dmaCTRLPKT1.CHCTRL    = 0;                 /* channel control            */
   g_dmaCTRLPKT1.FRCNT     = F_COUNT;                 /* frame count                */
   g_dmaCTRLPKT1.ELCNT     = E_COUNT;            /* element count              */
   g_dmaCTRLPKT1.ELDOFFSET = 0;                 /* element destination offset */
   g_dmaCTRLPKT1.ELSOFFSET = 0;                 /* element destination offset */
   g_dmaCTRLPKT1.FRDOFFSET = 0;                 /* frame destination offset   */
   g_dmaCTRLPKT1.FRSOFFSET = 0;                 /* frame destination offset   */
   g_dmaCTRLPKT1.PORTASGN  = PORTA_READ_PORTA_WRITE;
   g_dmaCTRLPKT1.RDSIZE    = ACCESS_32_BIT;     /* read size                  */
   g_dmaCTRLPKT1.WRSIZE    = ACCESS_32_BIT;     /* write size                 */
   g_dmaCTRLPKT1.TTYPE     = FRAME_TRANSFER ;   /* transfer type              */
   g_dmaCTRLPKT1.ADDMODERD = ADDR_INC1;         /* address mode read          */
   g_dmaCTRLPKT1.ADDMODEWR = ADDR_INC1;        /* address mode write         */
   g_dmaCTRLPKT1.AUTOINIT  = AUTOINIT_ON;       /* autoinit                   */


   //g_dmaCTRLPKT2.SADD      = (uint32)(0x80001000);  //0x08076000);    /* source address */
   g_dmaCTRLPKT2.SADD      = (uint32)TXDATA_RAM1;  //0x08076000);    /* source address */
   g_dmaCTRLPKT2.DADD      = (uint32)RXDATA_RAM1;       /* destination  address       */
   g_dmaCTRLPKT2.CHCTRL    = 0;                 /* channel control            */
   g_dmaCTRLPKT2.FRCNT     = F_COUNT;                 /* frame count                */
   g_dmaCTRLPKT2.ELCNT     = E_COUNT;             /* element count              */
   g_dmaCTRLPKT2.ELDOFFSET = 0;                 /* element destination offset */
   g_dmaCTRLPKT2.ELSOFFSET = 0;                 /* element destination offset */
   g_dmaCTRLPKT2.FRDOFFSET = 0;                 /* frame destination offset   */
   g_dmaCTRLPKT2.FRSOFFSET = 0;                 /* frame destination offset   */
   g_dmaCTRLPKT2.PORTASGN  = PORTA_READ_PORTA_WRITE;
   g_dmaCTRLPKT2.RDSIZE    = ACCESS_32_BIT;     /* read size                  */
   g_dmaCTRLPKT2.WRSIZE    = ACCESS_32_BIT;     /* write size                 */
   g_dmaCTRLPKT2.TTYPE     = FRAME_TRANSFER ;   /* transfer type              */
   g_dmaCTRLPKT2.ADDMODERD = ADDR_INC1;         /* address mode read          */
   g_dmaCTRLPKT2.ADDMODEWR = ADDR_INC1;       /* address mode write         */
   g_dmaCTRLPKT2.AUTOINIT  = AUTOINIT_ON;       /* autoinit                   */

   /* - setting dma control packets */
   dmaSetCtrlPacket(DMA_CH1, g_dmaCTRLPKT1);  //tx
   dmaSetCtrlPacket(DMA_CH0, g_dmaCTRLPKT2);  //rx

   /* - setting the dma channel to trigger on h/w request */
   dmaSetChEnable(DMA_CH1, DMA_SW);
   dmaSetChEnable(DMA_CH0, DMA_SW);

   /* Enable Block Transfer Complete interrupt for the receive after transfer complete */
   dmaEnableInterrupt(DMA_CH0, FTC, DMA_INTA);
   dmaEnableInterrupt(DMA_CH1, FTC, DMA_INTA);

   dmaEnable();

   for(i=1; i<F_COUNT; i++)
   {
       dmaSetChEnable(DMA_CH1, DMA_SW);
       dmaSetChEnable(DMA_CH0, DMA_SW);
       j = i;
   }

   while(1); /* loop forever */

/* USER CODE END */

    return 0;
}


/* USER CODE BEGIN (4) */

/** void loadDataPattern(uint32 psize, uint16* pptr)
*/
void loadDataPattern(uint32 psize, uint32* pptr, uint32 pattern)
{
    int i;
    for(i=0;i<psize;i++)
    {
        *(pptr++) = pattern + i;
    }
 }


/**************************************************************************//**
 *  DMA Interrupt
 *****************************************************************************/
void dmaGroupANotification(dmaInterrupt_t inttype, uint32 channel)
{
/*  enter user code between the USER CODE BEGIN and USER CODE END. */
    if(channel ==0){
        Channel0_HBC_Flag = 1;
    }
    if(channel == 1){
        Channel1_HBC_Flag = 1;
    }
}


/* USER CODE END */